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99105/99110 Accelerators?

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18 hours ago, Tursi said:

That comes up for me sometimes too. But... if it's in the same shell, and it uses the same peripherals, and it runs the same software, I'm kind of okay with it. ;)


Like, I've been sorely tempted to drop a cheap PC in the console with the necessary hookups to run the hardware, and use an integrated emulator for the compatibility function. It'd be fun. If it wasn't also a multi-year full time project, I think I'd have done it already. ;) 


At the end of the day it’s all for funsies, isn’t it?

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Thinking about which chips are more likely for a socket-compatible plug-in board:


Since the 9900 socket has a 16-bit bus, the 9995 needs lots of redundant chips. 
The 99105 has a 16-bit bus and might be "less difficult". 

Then I considered  the TMS38010 again. I am calling this chip "The Last 9900." It was released  late in 1985! It was built to process token ring frames at 3 MBps.


(The TMS380 was conceived under TI's new Microprocessor Group strategy under Wally Rhines, which also produced the home run TMS320, and TMS340.) 

The databook omits the CRU instructions, which would have to be emulated if they don't exist. It has the 9995 instructions MPYS, DIVS, LWP, etc. It has 2.5K of parity RAM onboard, but some device register holes in 0000-0FFE. So original ROMs would be problematic.  

Its advantage is blazing fast execution in that RAM region!!!


In addition to 16K of external ROM firmware, TI supplied a tiny binary to run out of that onboard RAM.


The code in onboard RAM was the LLC (Logical link control). This term refers to the OSI networking model. LLC is just above the physical layer and "defines the way data is formatted for transmission and how access to the network is controlled." I quote this to indicate that it must have very fast throughout. 



The TMS38010 has a 333 ns cycle time like the 9900,  but seems  to have the pipeline optimizations of the 9995 and 99105.


If the TMS38010 is a bad fit for a 9900 replacement, WHAT IF it could be reprogrammed to be an Ethernet coprocessor?


At least one person did this at TI in the 1990s.



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Or the TMS38010 as a floating point coprocessor?

This idea follows my philosophy of "Use original chips."



As a dedicated floating point coprocessor next to the 9900, it could trap the 4A ROM floating point entry addresses, putting the 9900 into wait states.

Then it would run code from its onboard RAM, finally placing the result in FAC.

To return control to the 9900, it places a return opcode (or branch) onto the data bus and releases READY. The 9900 reads the opcode and returns to the caller, unaware of the coprocessor. 


With the TMS38010 internal optimizations, I bet it could execute floating point code several times  faster than the 9900. Since registers and PAD are in memory, the 9900 hides no internal state. The coprocessor reads FAC and ARG from PAD on the 4A bus.  

Other ROM routines might also be patched in this way.


To return control to the 9900, the coprocessor puts the appropriate branch or return opcodes on the bus, so the 9900 jumps over the original ROM  code. 

I'm intrigued by what you could do with actual chips from the period--not FPGA upgrades. 

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