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10 minutes ago, mizapf said:

I remember that I translated the German SNUG comments to English in that source file; I suppose this is what you think of.

Yes, for the /4a, and I used that file to validate and reconcile the Geneve source.  The Geneve OS source contains the code for both ‘modes’.  

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5 hours ago, RickyDean said:

Okay, looks like mine, except you have additional wiring and mods on the backside and the daughter board that looks like it houses a CLPD PLCC instead of the originial PALCE gals on U12 and U13

That's the SNUG daughter board. It is also the reason for the extra wires on the main circuit card. Note that the DSR chip is probably different as well, as I strongly suspect the "B" in V1.6B stands for Becker.

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3 hours ago, Jeff White said:

I meant Will McGovern's original code.

What I can tell you is that we have the entire low-level code for bank 7, updated to work with the PDMA modification v1.6 and (I believe was) built on Will's original code.  I do not believe that I have the v1.5 low-level code for the unmodified cards, though I wonder if it exists on an old hard drive platter.  Seems to me I looked for it once before.   The files would be from 1994 when Bud gathered you, Dan, me, Mike together in Indiana.  We have code for higher level functions banks 0-6 but I don't know that anyone has ever reconciled them to the binary EPROM.   The last high-level review I completed was in the early 2000s when we were trying to track down a bug that presumably manifested after caching a certain number of directory entries (for quick access) but it wasn't easily reproduced nor found. 

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