Checking in on the Jaguar FPGA core

[awbacon]

surprising it plays as much as it does and hoping to see it finished some time in 2024

 

 

[+Gemintronic]

Yeah.  Was excited because I could leave the Jag in my livingroom and just use a MiSTer in the office.  But, the need for a second RAM module and edgy posts by the core dev left a lot to be desired.

[awbacon]

8 hours ago, Gemintronic said:

Yeah.  Was excited because I could leave the Jag in my livingroom and just use a MiSTer in the office.  But, the need for a second RAM module and edgy posts by the core dev left a lot to be desired.

yeah I heard they werent exactly a charmer 

[alexh]

Is this the core that originally came from the Atari Tom/Jerry netlist files converted to Synthesisable HDL by Torlus aka Gregory Estrade? I know Electron Ash tinkered with this a bit. In theory being converted directly from the original designs from Atari it should be very compatible but I seem to remember the latency of MiSTer RAM is a big issue.

 

GITHUB seems to show no work on this for the last 2-years and even then it was only bringing it to MiSTer Framework.

Edited May 13 by alexh

[42bs]

GPU emulation seems to be buggy.

See the glitches in JagNICCC2000 demo which are likely not related to the Blitter as it draws only horizontal line.