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Building a lynx??


Haydn Jones

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Processors: Mikey (8-bit 65C02 @ 3.6 MHz), Suzy (16-bit blitter @ 16 MHz)

Sound: 4 channel, stereo on Lynx II

Resolution: 160x102

Colors: 16 onscreen out of 4,096

Display size: 3.5"

Memory: 64K RAM, game cards up to 512K

Original 1990 Price: $179

Special Features: Scaling, rotation, distortion, clipping, tilting, flip screen

 

Can fpga do this, is it possible for the right people to build a lynx 3 with 12 hours batery and all the mod cons we take for granted now? And is one of the chips a cut down common chip?

 

Haydn

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Processors: Mikey (8-bit 65C02 @ 3.6 MHz), Suzy (16-bit blitter @ 16 MHz)

Sound: 4 channel, stereo on Lynx II

Resolution: 160x102

Colors: 16 onscreen out of 4,096

Display size: 3.5"

Memory: 64K RAM, game cards up to 512K

Original 1990 Price: $179

Special Features: Scaling, rotation, distortion, clipping, tilting, flip screen

 

Can fpga do this, is it possible for the right people to build a lynx 3 with 12 hours batery and all the mod cons we take for granted now? And is one of the chips a cut down common chip?

 

Haydn

832169[/snapback]

 

I was looking at this approach also about a year ago. The 65SC02 core is freely available as a VHDL model. The sound and graphics is fairly well understood. The ComLynx port is just a RS232 port and the cart interface is really simple.

 

So yes, the Lynx 3 could be made using perhaps a 150k fpga.

 

But it is even easier to take a new games console and optimize Handy for that now as Handy sources are available.

 

--

Regards,

 

Karri

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But it is even easier to take a new games console and optimize Handy for that now as Handy sources are available.

835623[/snapback]

 

Its not quite the same as having a real cart slot, and apart from the psp. no console looks cool enough to be a lynx.

 

Haydn

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Yes

835831[/snapback]

 

If there is some brave soul who would like to work on this then I have

several PowerPC-based boards with Spartan II 150k FPGA's on them.

 

They run Linux as an operating system and it has a special device

/dev/fpga for programming the FPGA chip on the fly.

 

My idea was to port the Handy code to run on the PowerPC and transfer

the display, sound and keypad stuff over Ethernet to my workstation.

 

Then I would move the code piece by piece from Handy to the FPGA

starting be running the CPU emulation in hardware instead of software.

 

The FPGA has direct access to the memory just like the PowerPC.

 

Once everything has been ported to the FPGA we would have a Lynx

on a chip.

 

This Lynx-on-a-chip could then be used as a component for designing

something cool like an universal game console where you download

the hardware together with the software?

 

Any takers?

 

--

Cheers,

 

Karri

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Yes

835831[/snapback]

 

If there is some brave soul who would like to work on this then I have

several PowerPC-based boards with Spartan II 150k FPGA's on them.

 

 

 

Spartan IIs are too expensive when compared to Spartan IIIs :)! As far as I can tell based on the 2600, the 6502 will be around 700 slices (1,400 logic elements).

 

I cannot see the graphics hardware taking more than another 2,000 LEs. I know nothing of Suzi, but I'm sure it cannot be more complex than that. TIA currently uses around 700 logic elements and I haven't optimized what I can for area. Another thing to keep in mind is that the newer the graphics chip gets, the easier it becomes to port to an FPGA. As designs progressed throughout the 80s, they became more and more synchronous as the timing analysis tools evolved...therefore, they're better suited to FPGA technology! I basically have to use two flip flops for each "dynamic-flop" in TIA. Therefore, my design is probably double what it needs to be if I could get away with using a single flop for each storage element. You probably will not run into this problem with Suzi.

 

Another thing, the Spartan III 400s have a lot of embedded memory. Not enough to store game code and the like, but enough to possibly hold the BIOS and other misc stuff. Just a suggestion, try to keep your design in a TQFP if you want the parts / PCBs to remain relatively inexpensive. Having the embedded RAM saves you cost down the road.

 

I'd kind-of stay away from the CPU emulation as it would probably be more of a distraction than anything (however, it would be VERY cool :) )...try to build each section of the chip and monitor the results as you go.

 

For example, while building the 2600, I implemented the primary control logic first (CPU clock generator, playfield logic, HSYNC control, HMOVE registers). After I was happy with what I saw, I went on to the ball logic, followed by player logic, and finally missile logic. During the first phase (HSYNC & playfield), I was able to knock out a lot of 6502 issues.

 

Adding the CPU emulation of Lynx while developing hardware doesn't seem to do much unless I am missing something. I understand that you can use it for testing purposes, but that's about all you'll gain. You can generally tell if something is going to work by running a few frames of simulated code.

 

Overall, I find this very doable and I'd like to help out if I can! I have the nMOS opencores 6502 fairly stable for all "documented" opcodes ... I'll be more than happy to forward you what I have. I'd need info on Suzi to help out. I'm sure I could get emulator source code, but having a register map and a better understanding from a HW point of view would be a bonus!

 

Ed

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Wow!

 

In a way I would LOVE to tackle a project like this. But the sad thing is that I really

don't believe in doing another games machine from scratch unless there is some great bonus functionality that would make a difference.

 

To make a difference you need extras like you get from Nokia n-gage or a Sony PSP.

 

But of course a Lynx 3 would be a very cool thing to do :D

 

--

Karri

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  • 2 weeks later...
  • 2 years later...

 

If there is some brave soul who would like to work on this then I have

several PowerPC-based boards with Spartan II 150k FPGA's on them.

 

 

 

Spartan IIs are too expensive when compared to Spartan IIIs :)! As far as I can tell based on the 2600, the 6502 will be around 700 slices (1,400 logic elements).

 

I cannot see the graphics hardware taking more than another 2,000 LEs. I know nothing of Suzi, but I'm sure it cannot be more complex than that. TIA currently uses around 700 logic elements and I haven't optimized what I can for area. Another thing to keep in mind is that the newer the graphics chip gets, the easier it becomes to port to an FPGA. As designs progressed throughout the 80s, they became more and more synchronous as the timing analysis tools evolved...therefore, they're better suited to FPGA technology! I basically have to use two flip flops for each "dynamic-flop" in TIA. Therefore, my design is probably double what it needs to be if I could get away with using a single flop for each storage element. You probably will not run into this problem with Suzi.

 

Another thing, the Spartan III 400s have a lot of embedded memory. Not enough to store game code and the like, but enough to possibly hold the BIOS and other misc stuff. Just a suggestion, try to keep your design in a TQFP if you want the parts / PCBs to remain relatively inexpensive. Having the embedded RAM saves you cost down the road.

 

I'd kind-of stay away from the CPU emulation as it would probably be more of a distraction than anything (however, it would be VERY cool :) )...try to build each section of the chip and monitor the results as you go.

 

For example, while building the 2600, I implemented the primary control logic first (CPU clock generator, playfield logic, HSYNC control, HMOVE registers). After I was happy with what I saw, I went on to the ball logic, followed by player logic, and finally missile logic. During the first phase (HSYNC & playfield), I was able to knock out a lot of 6502 issues.

 

Adding the CPU emulation of Lynx while developing hardware doesn't seem to do much unless I am missing something. I understand that you can use it for testing purposes, but that's about all you'll gain. You can generally tell if something is going to work by running a few frames of simulated code.

 

Overall, I find this very doable and I'd like to help out if I can! I have the nMOS opencores 6502 fairly stable for all "documented" opcodes ... I'll be more than happy to forward you what I have. I'd need info on Suzi to help out. I'm sure I could get emulator source code, but having a register map and a better understanding from a HW point of view would be a bonus!

 

Ed

 

has any progress been made on this? I'm deeply interested in doing this too, but also need more info on Mikey and Suzy.

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