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The 7800 cartridge board thread


Bruce Tomlin

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The last part of 7800 development is still missing. We still don't have any cartridge boards to put new games on.

 

Here's an idea I have for a generic 7800 cartridge, which should handle up to 144K ROM or 128K ROM and 16K RAM using a single 20V8 GAL for decoding. It will also take a 7402 chip in place of the GAL (with pin 1 in pin 1) to handle non-bankswitched ROM-only cartridges up to 48K by adding two jumpers. This is a really good idea, since 7402 chips are a lot cheaper than GAL chips, and you won't even need a GAL chip unless you need bankswitched ROM, RAM, or a POKEY.

 

Both 8K 6164 and 32K 61256 RAM chips will be supported. Normally only half of a 32K RAM will be used, but it should be possible to have a 16K ROM/32K RAM configuration.

 

It should have holes for a POKEY chip, which will be placed offset from the RAM holes, so that you can use either. It would also be nice to have holes to take both narrow and wide 16K RAMs, because I've found a lot of narrow 32K RAMs on old 486 motherboards. The pins, starting from the top, will be something like: RAM 28-15, POKEY 20-1 (yes, pointing the other way), narrow RAM 1-14, wide RAM 1-14, POKEY 21-40. If the GAL is vertical at a top corner, a second set of narrow RAM holes can be put just above the ROM chip (instead of the row of narrow RAM holes at the top) to allow a POKEY+RAM cartridge. Of course the ROM will have 32 holes.

 

It would be nice to only have have narrow RAM holes, but sometimes you want ROM in there (for 144K games), so there will still have to be holes for a wide RAM chip. (However, it may be possible to use another bank select address line and a 256K ROM for 144K games.)

 

When either POKEY, RAM, or the 78SC_LOW mapping (with bank N-1 at $4000-$7FFF) is used, the BA17 output will have to be used for a function other than bank select. When both POKEY and RAM are used, there are not enough outputs with a 20V8 GAL to use more than 64K of ROM. Upgrading to a 22V10 gives two more outputs, and should be able to support 512K ROM or 256 ROM+POKEY+RAM, though it might require some board modifications.

 

Another problem with POKEY+RAM is that more address lines are needed to split the address space. At the very least, pin 4 of the GAL will need to be connected to A12 for POKEY + 8K RAM. Since Commando and Ballblazer both access POKEY at $4000-$400F, it should be put in the $4000-$5FFF 8K range, with RAM at $6000-$7FFF. Wiring up more address pins to GAL inputs and programming a 20V8 GAL appropriately would allow at least 14K RAM with a POKEY.

 

For Rescue on Fractalus, there will need to be some rewiring of the address line A8 to RAM. Cutting it should probably be sufficient.

 

There are lots of options that could be made possible with more jumper points, but they would clutter an already tight board. The more common ones (most of the modes that the Cuttle Cart 2 supports, plus a 256K ROM mode) should be supported with the main jumpers. For the more "unique" combinations (32K RAM, POKEY+RAM, Fractalus), the board should be designed such that the traces that need to be cut can be done so with little trouble, along with a few new connections made with wire wrap wire, and possibly the use of a 22V10 GAL.

 

20V8 pinout:

 1 LCI   latch clock input (from pin 22) (7402 output)
 2 CLK2  6502 phase 2 clock
 3 RW    6502 read/!write control
 4 ---   connect via resistor to +5 volts (7402 output)
 5 A14   6502 address A14
 6 A15   6502 address A15
 7 XGND  (7402 ground; connect to ground)
 8 D4    6502 data D4 (for 512K with 22V10)
 9 D0    6502 data D2
10 D1    6502 data D1
11 D2    6502 data D0
12 GND

13 OE    output enable (from pin 15)
14 D3    6502 data D3
15 OEO   output enable out (to pin 13) to select bank 7 (or BA18/POKEY with 22V10)
16 BA17  bank select address A17 / POKEY select
17 BA16  bank select address A16
18 BA15  bank select address A15
19 BA14  bank select address A14
20 ROMCS ROM chip select (7402 output)
21 RAMCS RAM/POKEY chip select
22 LCO   latch clock output (to pin 1)
23 ---   connect via resistor to +5 volts (7402 output)
24 +5

* = bank switching method supported by CC2

*8K, 16K, 32K: 8K-32K ROM 2764/27128/27256 at 8000-FFFF
   use 7402 and wire jumpers across 7402 pins 6-19-18 or...
   OEO   = 0
   BA17  = unused
   BA16  = unused
   BA15  = unused
   BA14  = A14 -> ROM 29 (27)
   ROMCS = !A15 -> ROM 20/22 (22/24)
   RAMCS = unused
   LCO   = unused

 8K/8K, 16K/8K, 32K/8K: 8K-32K ROM 2764/27128/27256 at 8000-FFFF,
                           16K RAM 6264 at 4000-7FFF
   OEO   = 0
   BA17  = unused
   BA16  = unused
   BA15  = unused
   BA14  = A14 -> ROM 29 (27)
   ROMCS = !A15 -> ROM 20/22 (22/24)
   RAMCS = !(!A15 & A14 & CLK2) -> RAM 20/22  (can also be A15 + !A14 + !CLK2)
   LCO   = unused

*48K: 48K ROM at 4000-FFFF
   ROM 27512
   use 7402 and wire jumpers across 7402 pins 5-19 and 6-18 or...
   OEO   = 0
   BA17  = unused
   BA16  = unused
   BA15  = A15 -> ROM 3 (1)
   BA14  = A14 -> ROM 29 (27)
   ROMCS = !A15 & !A14 -> ROM 20/22 (22/24)
   RAMCS = unused
   LCO   = unused

*POKEY: 8K-32K ROM 2764/27128/27256 at 8000-FFFF, POKEY at 4000-7FFF
   (it should be possible to wire this up with just a 7402, but it's
    too hard to make it socket-compatible with a 20V8, so it will
    require board modifications, and maybe even 7402 pins sticking out
    horizontally)
   OEO   = 0
   BA17  = A14 & !CLK2 -> POKEY CS1
   BA16  = unused
   BA15  = unused
   BA14  = A14 -> ROM 29 (27)
   ROMCS = !A15 -> ROM 20/22 (22/24)
   RAMCS = unused
   LCO   = unused
           A14 -> POKEY  CS1
           A15 -> POKEY !CS0

  64K POKEY:  64K banked ROM 27256 at 8000-FFFF, POKEY at 4000-7FFF
*128K POKEY: 128K banked ROM 27010 at 8000-FFFF, POKEY at 4000-7FFF
 256K POKEY: 256K banked ROM 27020 at 8000-FFFF, POKEY at 4000-7FFF
   note: ROM pin 30 (28) must be jumpered for 256K
   OEO   = A14
   BA17  = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC)
   BA16  = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2
   BA15  = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3
   BA14  = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29
   ROMCS = !A15 -> ROM 20/22
   RAMCS = unused
   LCO   = (!A14 & !RW) + !A15 + !CLK2
           A14 -> POKEY  CS1
           A15 -> POKEY !CS0

* 64K:  64K banked ROM 27512 at 8000-FFFF
*128K: 128K banked ROM 27010 at 8000-FFFF
 256K: 256K banked ROM 27020 at 8000-FFFF
   note: ROM pin 30 (28) must be jumpered for 256K
   OEO   = A14
   BA17  = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC)
   BA16  = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2 (NC)
   BA15  = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3 (1)
   BA14  = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29 (27)
   ROMCS = !A15 -> ROM 20/22
   RAMCS = unused
   LCO   = (!A14 & !RW) + !A15 + !CLK2

* 64K/8K:  64K banked ROM 27512 at 8000-FFFF, 8K RAM 6164 twice at 4000-7FFF
*128K/8K: 128K banked ROM 27010 at 8000-FFFF, 8K RAM 6164 twice at 4000-7FFF
 256K/8K: 128K banked ROM 27020 at 8000-FFFF, 8K RAM 6164 twice at 4000-7FFF
   use 16K RAM 6264 instead

  64K/16K:  64K banked ROM 27512 at 8000-FFFF, 16K RAM 61256 at 4000-7FFF
*128K/16K: 128K banked ROM 27010 at 8000-FFFF, 16K RAM 61256 at 4000-7FFF
 256K/16K: 256K banked ROM 27020 at 8000-FFFF, 16K RAM 61256 at 4000-7FFF
   note: ROM pin 30 (28) must be jumpered for 256K
   OEO   = A14
   BA17  = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC)
   BA16  = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2 (NC)
   BA15  = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3 (1)
   BA14  = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29 (27)
   ROMCS = !A15 -> ROM 20/22
   RAMCS = !(!A15 & A14 & CLK2) -> RAM 20/22  (can also be A15 + !A14 + !CLK2)
   LCO   = (!A14 & !RW) + !A15 + !CLK2

*128K-LOW: 128K banked ROM 27010 at 8000-FFFF, bank 6 at 4000-7FFF
   use 144K 27010/27128 instead
   can also be made to work with 22V10 and re-wiring

  80K:  64K banked ROM 27512 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF
*144K: 128K banked ROM 27010 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF
 272K: 256K banked ROM 27020 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF
   note: ROM pin 30 (28) must be jumpered for 272K
   OEO   = A14
   BA17  = D:D3, C:LCI, OE, resistor to +5 volts -> ROM 30 (NC)
   BA16  = D:D2, C:LCI, OE, resistor to +5 volts -> ROM 2
   BA15  = D:D1, C:LCI, OE, resistor to +5 volts -> ROM 3
   BA14  = D:D0, C:LCI, OE, resistor to +5 volts -> ROM 29
   ROMCS = !A15 -> ROM 20/22
   RAMCS = A15 + !A14 -> ROM 20/22
   LCO   = (!A14 & !RW) + !A15 + !CLK2

 256K/16K/POKEY: 256K banked ROM 27020 at 8000-FFFF, POKEY at 7FF0-7FFF,
                 16K RAM 6264 at 4000-7FEF
   requires 22V10 and re-wiring

 512K:     512K banked ROM 27040 at 8000-FFFF
 512K/16K: 512K banked ROM 27040 at 8000-FFFF, 16K RAM  6264 at 4000-7FFF
 528K:     512K banked ROM 27040 at 8000-FFFF, 16K ROM 27128 at 4000-7FFF
   requires 22V10 and re-wiring

*FRACTALUS: 32K ROM at 8000-FFFF, 4K RAM at 4000-7FFF with A8 not connected
  start with 32K/8K, and jumper A8 of RAM to ground

 

2005-07-06 EDIT: updated the intro text, fixed the RAM chip 6116/6164/61256 coinfusion

Edited by Bruce Tomlin
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http://www2.asw.cz/~kubecj/7800cart.htm

 

http://atarihq.com/danb/7800cart/C025513.shtml

 

Top Link has a board layout ready for printing that uses EPROM's upto 32K. Requires the 7800 cartridge shell since it is a bit different. I am modifying the design a bit to try and put the chips in the upper housing area so that they aren't in an open exposed area. Actually coming along well.

 

Bottom one looks like somebody did schematics for Atari's EPROM PCB. So both are a starting place if somebody wants to expand this.

 

Corey

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Does anyone have the mechanical specs for a card edge connector, namely the somewhat wierd one that the 7800 uses?

 

I've not seen any PCB layout software that offers good support for card edge connectors at all, and I'm pretty sure you'd have to roll your own for the 7800's notched connector.

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It uses the farthest two connectors on each side. I have seen some PCB places cut out areas as needed (at an additional cost). Not sure if they would do this area specifically since it just cuts between two locations. But I don't think it would be hard to do it by yourself as long as you are close.

 

Corey

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I realized this morning that I got the RAM sizes wrong. 6116 is 2K. 6264 and 61256 are 8K and 32K, and they are pin-compatible with almost no board rewiring (6264 CS1 needs to be wired to +5 instead of A13). So the 8K RAM option can work just fine. I'll update the first post when I get a chance. And I do have a lot of 61256 and similar chips salvaged from old 386 and 486 motherboards. I'll have other things keeping me busy for the next 2 1/2 weeks, but when that's over, I'll want to start prototyping the design and making the various JEDEC files for the GAL chip.

 

And I just came up with a name for it... the "Ultracart" board. :-)

 

http://www2.asw.cz/~kubecj/7800cart.htm

http://atarihq.com/danb/7800cart/C025513.shtml

 

Top Link has a board layout ready for printing that uses EPROM's upto 32K.  Requires the 7800 cartridge shell since it is a bit different.  I am modifying the design a bit to try and put the chips in the upper housing area so that they aren't in an open exposed area.  Actually coming along well.

 

Bottom one looks like somebody did schematics for Atari's EPROM PCB.  So both are a starting place if somebody wants to expand this.

I don't think board manufacturers normally take Postscript files, do they? I don't know what a Karateka was doing using that board anyhow; the only one I've seen was a simple 2-chip board with custom chip selects on the mask ROMs. It's also not the C100339 "Hat Trick" Supercart board that I'm familiar with. I long ago traced out the C100339 schematic and recently redrew it in a much easier to read layout than before. I still need to fill in all the ROM and RAM pin numbers, though.

 

The second one is less than useful, since it only takes 27128 chips for 16K or 32K, or a single 2764 for 8K.

 

My objective is to handle all the problems at once with a single board, since making more than one kind of board is much more trouble and expense than just getting it right from the start. And that especially includes POKEY support, since Beef Drop means homebrew POKEY support is needed right out of the gate. I want this board to support everything that is physically possible to cram into the standard "T-bar" form factor.

 

Does anyone have the mechanical specs for a card edge connector, namely the somewhat wierd one that the 7800 uses?

 

I've not seen any PCB layout software that offers good support for card edge connectors at all, and I'm pretty sure you'd have to roll your own for the 7800's notched connector.

The card edge is nothing special. It's just a bog standard 36-pin 0.1" card edge connector with four lands missing, replaced by two extra saw cuts to mate with the keys in the slot.

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I don't think board manufacturers normally take Postscript files, do they?

 

No, they're going to want Gerber files (which are CAD files describing the positions and shapes of pads, traces, etc...). So far I've done a bankswitching board for the A8 and 5200, a Flash board and programmer for the Jag and other non-Atari PCB's, so let me know if you need any help.

 

-Bry

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I don't think board manufacturers normally take Postscript files, do they?

 

No, they're going to want Gerber files (which are CAD files describing the positions and shapes of pads, traces, etc...). So far I've done a bankswitching board for the A8 and 5200, a Flash board and programmer for the Jag and other non-Atari PCB's, so let me know if you need any help.

 

-Bry

857412[/snapback]

 

No they won't take postscript files. I think the file was meant to print on a laser printer using the heat transfer sheets to put on a board to etch yourself. I have converted the file to Photoshop to work with myself, but you would have to recreate it into a Gerber file.

 

Corey

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  • 1 month later...

Now I'm starting to get a proto board set up so that I can test the various GAL configurations.

 

Here's my current schematic and a partially completed circuit board layout (at 100dpi)

post-4828-1121026144_thumb.jpg post-4828-1119215581_thumb.jpg

 

and these are pictures of the extender cable I made for the proto board.

post-4828-1119215606_thumb.jpg post-4828-1119215622_thumb.jpg

 

EDIT: 2005-07-10 updated schematic

Edited by Bruce Tomlin
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Well, so far I have no joy. My first step is to get it working without bank switching. It almost works, but it's not reliable. Kicking in cart-dumper mode shows significant chunks that should be all FF having about 5-10% random bytes. I've shortened the cable and swapped out almost everything except the ROM (it's a 28-pin flash ROM that I had handy and already programmed) and the slot adapter, but it still doesn't work right.

 

As for the board design, if someone else wants to make it to the point where a real board can be manufactured, great. But with that extra socket for narrow RAM to allow RAM+POKEY, it's going to be really tight in there.

 

And you know, it never occurred to me that a 7800 cartridge doesn't really need those pins. Hmm.

Edited by Bruce Tomlin
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Gah.  It was the stupid flash chip.  It works fine in a regular cart board, but I guess it's just a bit too slow to work in a proto board on an extender cable.  Now I can move forward again.

877336[/snapback]

Great!

I like your approach to support extended RAM and Pokey.

Keep it up.

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One thing that might be nice is if enough address lines can be decoded to give the POKEY as small foot print as possible like 16, 32 or 64 bytes (anything is better than 16K). It, and the RAM could then share a 16K block with most but not all of the RAM available (maybe there is also some other small block of memory POKEY could be placed that is not used by 7800 or the HSC, if there is any).

 

Would it be possible (does a 2600/7800 case have the space), where a POKEY and RAM could be mounted offset and on opposite sides of the board? I realize then routing the traces might be more difficult. You could cheat a little by mixing up data lines, or mixing up address lines since for RAM it wouldnt necessarily matter except for the upper address lines if multiple RAM sizes are supported. Is there really any reason to need the RAM socket to also support ROM? I guess it can give you 48K rom without needing to use a GAL?

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One thing that might be nice is if enough address lines can be decoded to give the POKEY as small foot print as possible like 16, 32 or 64 bytes (anything is better than 16K).  It, and the RAM could then share a 16K block with most but not all of the RAM available (maybe there is also some other small block of memory POKEY could be placed that is not used by 7800 or the HSC, if there is any).

 

Would it be possible (does a 2600/7800 case have the space), where a POKEY and RAM could be mounted offset and on opposite sides of the board?  I realize then routing the traces might be more difficult.  You could cheat a little by mixing up data lines, or mixing up address lines since for RAM it wouldnt necessarily matter except for the upper address lines if multiple RAM sizes are supported.  Is there really any reason to need the RAM socket to also support ROM?  I guess it can give you 48K rom without needing to use a GAL?

The problem with a smaller POKEY window is that for every address line you want to check, it has to actually get into the GAL somehow. The way bank switching on the 7800 normally works only uses A15 and A14. I suppose it would be nice to use those three pins that correspond to 7402 output/ground pins, and just make people rip pins off of the 7402 (barbarians!) If you had three more address lines, that would be a 2K POKEY window and 14K RAM. Sub-$4000 blocks are out of the question because you would need a lot more address lines.

 

As for the RAM issue, I guess I should make explicit what I am trying to accomplish with my board layout. If you look at my pictures, the bottom chip is the main ROM, which can be bank switched. The next chip up is for a narrow (0.3") RAM chip (I got lots of 32K narrow chips). The vertical chip on the end is a GAL chip or a 7402, which is the brains of the operation. The remaining position is an offset position for one of three things: 1) POKEY, 2) wide RAM chip, or 3) second ROM, non-bankswitched. Both RAM positions are wired together completely.

 

Yes, there needs to be support for a ROM, for people who want to make repros of 144K games. There is no way with an ordinary GAL chip to make the main chip support anything but standard bankswitching with a single "flat" region. I can't even get it to support the "low" mode which puts bank 6 at $4000. (Actually, it would be just barely possible using a 22V10 and taking up two or three more outputs.) But since "low" mode can be done by using a second ROM chip, it's no big loss. (Hmm, more thinking... if you got a chip twice as big as you need and programmed every 16K region of the second half with the same thing, then used an extra address line to select the virtual "other" chip, maybe that would work.)

 

But if I can't get RAM and POKEY to have a smaller window than 16K, I guess it wouldn't matter that I can fit both of them on the board at the same time! Hmm, this could be tricky. Maybe the RAM CS and Pokey high-CS could be optionally rigged up to A13. That would give 8K RAM at $4000 and Pokey at $6000. Is there a standard address used for POKEY by Ballblazer/Commando/Beef Drop? I'll have to put some thought into the RAM+POKEY problem. I'd rather try to get the extra address lines into the GAL chip.

 

It's also a real tight fit to get all that in there. And you have to give up one bank select line in favor of the Pokey, so it cuts your maximum ROM size in half. A 22V10 can give you an extra output or two, but it's really overkill. And aside from the tube I found at Thrift Town, I've never found a DIP 22V10 in the wild on junk boards, even unsocketed. I've got a load of 20V8 and 16V8, though.

 

Opposite sides of the board is an interesting idea. However the thing about the Pokey is that if you point its pin 1 in the opposite direction from the RAM and ROM chips, the data lines are almost in the right place. Putting either on the wrong side of the board would cause the data lines to be less in conjunction. The GAL could probably handle it (as in the 2600 8K boards from Pixels Past), but I'd really like to avoid chips on both sides if at all possible. And then you have to make sure that the cartridge shell won't have anything in the way where you put the chip.

 

Really, though, what I'm trying to work on first is the schematic and GAL programming. If someone who knows more about getting actual boards made wants to make something from my basic chip layout, that's great. You don't even have to feel obligated to handle all the jumper options (I'm not sure that the Pokey IRQ would be all that useful). Anyhow, my first attempt will be to see if I can get a 32K RAM/16K ROM configuration working.

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(Hmm, more thinking... if you got a chip twice as big as you need and programmed every 16K region of the second half with the same thing, then used an extra address line to select the virtual "other" chip, maybe that would work.)

Even more interesting... using this method you could probably extend the bank switched region to a full 32K! Still no RAM without those pesky other address lines, though.

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As for the RAM issue, I guess I should make explicit what I am trying to accomplish with my board layout.  If you look at my pictures, the bottom chip is the main ROM, which can be bank switched.  The next chip up is for a narrow (0.3") RAM chip (I got lots of 32K narrow chips).  The vertical chip on the end is a GAL chip or a 7402, which is the brains of the operation.  The remaining position is an offset position for one of three things: 1) POKEY, 2) wide RAM chip, or 3) second ROM, non-bankswitched.  Both RAM positions are wired together completely.

As long as narrow RAM chips are fairly easy to come by then that sounds good. All I currently have on hand though are wide 62256's.
But if I can't get RAM and POKEY to have a smaller window than 16K, I guess it wouldn't matter that I can fit both of them on the board at the same time!  Hmm, this could be tricky.  Maybe the RAM CS and Pokey high-CS could be optionally rigged up to A13.  That would give 8K RAM at $4000 and Pokey at $6000.  Is there a standard address used for POKEY by Ballblazer/Commando/Beef Drop?  I'll have to put some thought into the RAM+POKEY problem.  I'd rather try to get the extra address lines into the GAL chip.

Ballblazer give the entire 16K to at $4000 I think. So then if you wanted 16K of RAM, then that only leaves 16K of ROM that can be resident at once. One alternative would be to give Write only access to pokey and put it in the same place as ROM (but then you loose read access to reading RANDOM and some interupt status registers). So are some GAL input's being sacrificed for the 7402 compatability?
It's also a real tight fit to get all that in there.  And you have to give up one bank select line in favor of the Pokey, so it cuts your maximum ROM size in half.  A 22V10 can give you an extra output or two, but it's really overkill.  And aside from the tube I found at Thrift Town, I've never found a DIP 22V10 in the wild on junk boards, even unsocketed.  I've got a load of 20V8 and 16V8, though.

GAL22V10's seem to be hard to find in DIPs but they do turn up on ebay from time to time. I have seen a lot more PAL22V10's which should be fine for final production of cartridges?
Opposite sides of the board is an interesting idea.  However the thing about the Pokey is that if you point its pin 1 in the opposite direction from the RAM and ROM chips, the data lines are almost in the right place.  Putting either on the wrong side of the board would cause the data lines to be less in conjunction.  The GAL could probably handle it (as in the 2600 8K boards from Pixels Past), but I'd really like to avoid chips on both sides if at all possible.  And then you have to make sure that the cartridge shell won't have anything in the way where you put the chip.
I didn't know how feasable it was, just throwing the idea out there, and it sounds like with the narrow RAM it would be unnecessary.

 

 

Keep up the good work.

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Ballblazer give the entire 16K to at $4000 I think.
I wasn't asking what the cart gave, I was asking what addresses the code in the games actually used.

 

Anyhow, I spent most of today hacking up an lame and ugly PAL compiler. After much mucking about with code, equations, and test vectors, I finally got test vectors that matched with the generated fuse map for a 128K + RAM configuration.

 

The bad news for me is that the proto board setup I have is just plain unreliable. I did get a desoldered RealSports Baseball ROM to start up, but it glitched and wouldn't run. So I'm probably going to have to rearrange the layout to put the extender cable closer to the EPROM. I hope that's all I need.

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Update: I wrapped aluminum foil around the ribbon cable and connected it to ground. Now RS Baseball starts up reliably, but also locks up reliably after pressing reset. Maybe I should build the standard TTL bank switch circuit as an experimental control to rule out problems with the bus to the ROM chip.

Edited by Bruce Tomlin
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I found three bugs tonight: I had wired up the D0-D2 inputs to the GAL to the extra (unconnected) pins in the ribbon cable, I had transcribed the bank switch schematic wrong and had an extra inverter bubble in the latch clock equation, and I had forgotten to include the R/W line in the ROM chip select, so once I fixed the first two, the ROM data would override the bank number from the 6502.

 

I can get it to run a 16K game, and using my 6502 monitor I can see that the bank switch is working correctly (and the RAM too), but it's not working when I try to run an actual game. Maybe now that the bank switch is working right, it's showing some new kind of speed problem.

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Well, I've verified with a cart dumper that I can read the cartridge properly a byte at a time. It just all flakes out at full speed and I can't run a bank switched game off of it. This is going to take some figuring out. I suspect it's something with the tri-state output for C000-FFFF. I guess I'll have to do a TTL version after all.

 

At least I've got the GAL equations right now.

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Today I got to try a different approach that I've been wanting to do all week. I took a regular Supercart, added a RAM socket, then desoldered and socketed the chips one at a time (making sure the board still worked and fixing it as necessary), then I hot-glued a strip of PC board to the top of it. I added a socket for the GAL and wired it up. Then I pulled the TTL chips, installed the GAL, and it worked the first time!

 

I was surprised how well the hot glue trick worked. It's pretty solid. I got the idea earlier today when I was googling around and saw where someone had hot glued one board to another for a project.

 

The next thing I did was to unswap A14 and A15 to where they should be (I had swapped them on one schematic), both on the new board and my old proto board. I've been working on a simple PAL compiler all week, which made it easy to swap the pins in the GAL chip programming.

 

I made a rig with a 32-pin socket to try a 27010 or similar chip, but I couldn't get that to work at all. I wired pins 1 and 32 to +5, and pin 2 to A16. Maybe I need to wire pin 31 to +5 volts too. So no 128K/144K games yet.

 

EDIT: Well, R1's on the wrong side of W5, for one thing. I pulled A16 directly from the GAL. I think A16 may need a pull-up resistor.

Edited by Bruce Tomlin
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