7800/6502 Hardware Questions

[supercat]

Well, the 2600 was an exercise in low parts count, so they used the 6507 as-is, rather than adding clock logic. Besides, the net effect is pretty much the same. The opcode fetch cycle after WSYNC is strobed will be extended until READY is lifted.

 

I wouldn't suggest using another chip to gate the clock. I was suggesting using the TIA to do it (since it's already responsible for generating the CPU's clock to begin with).

[EricBall]

I wouldn't suggest using another chip to gate the clock. I was suggesting using the TIA to do it (since it's already responsible for generating the CPU's clock to begin with).

Which would then screw up the RIOT timers which use the same clock signal. (A problem on the 7800 which down-shifts the clock signal when accessing the TIA and RIOT versus RAM/ROM/MARIA.)

[jbanes]

Which would then screw up the RIOT timers which use the same clock signal. (A problem on the 7800 which down-shifts the clock signal when accessing the TIA and RIOT versus RAM/ROM/MARIA.)

 

Which brings up a question that's really been bugging me. Does the 6502 downshift even for accesses like reading the Joystick Position, or is the lower clocking only triggered when you write to the TIA's ports? I've been crossing my fingers that it's the latter, because the former would make the chip incredibly erratic; but I'm concerned that I may just be practicing wishful thinking.

[PacMan]

Which would then screw up the RIOT timers which use the same clock signal. (A problem on the 7800 which down-shifts the clock signal when accessing the TIA and RIOT versus RAM/ROM/MARIA.)

 

Which brings up a question that's really been bugging me. Does the 6502 downshift even for accesses like reading the Joystick Position, or is the lower clocking only triggered when you write to the TIA's ports? I've been crossing my fingers that it's the latter, because the former would make the chip incredibly erratic; but I'm concerned that I may just be practicing wishful thinking.

 

The clock is always shifted down when when accessing the TIA and RIOT. I noticed that when implementing the RMT player on my 7800 using the XBoard and found that the POKEY was shifting the entire song down in pitch when holding a button down (= my stupid program). It went away with some clever programming

 

/P

[jbanes]

The clock is always shifted down when when accessing the TIA and RIOT. I noticed that when implementing the RMT player on my 7800 using the XBoard and found that the POKEY was shifting the entire song down in pitch when holding a button down (= my stupid program). It went away with some clever programming

 

Ack! That is not good. Not good at all.

 

I'm really starting to dislike the 7800...

[supercat]

I wouldn't suggest using another chip to gate the clock. I was suggesting using the TIA to do it (since it's already responsible for generating the CPU's clock to begin with).

Which would then screw up the RIOT timers which use the same clock signal. (A problem on the 7800 which down-shifts the clock signal when accessing the TIA and RIOT versus RAM/ROM/MARIA.)

 

I would have given the TIA output two clock signals. One would have been fed to the RIOT, and would run continuously; the other would have been fed to the 6507 and gated with the hblank-wait latch.

[supercat]

I would have given the TIA output two clock signals. One would have been fed to the RIOT, and would run continuously; the other would have been fed to the 6507 and gated with the hblank-wait latch.

 

Necro-posting...

 

Having looked some at the inner workings of the 6507, I don't think such an approach would have been a good idea. There's a lot of flying-signal logic in there; stopping the clock for 64us might cause some of the flying bits to fall on the floor.