2600 in 2006 - Cheap EEPROM cart

[RSS Bot]

Well, I've come up with a cheap method of adding a serial EEPROM to a cart. Albert's F8/F6/F4 board should be easily adaptable to the purpose. The EEPROM may be accessed much faster than the EEPROM in a MemCard/Atarivox--a rate of 298kbps. Indeed, it's 33% faster than even 4A50's EEPROM access which is itself quite impressive for a 6502.

 

Code to access the EEPROM must be stored in a pair of adjacent banks; 0 and 1 are recommended, but 2 and 3, 4 and 5, or 6 and 7 could be used if desired. The bottom bankswitch bit is connected to the EEPROM's data line; when the EEPROM is outputting a "zero", memory will be accessed from an even-numbered bank even if an odd-numbered bank is selected. Some care should be taken to ensure that the EEPROM is inactive when expecting to read odd-numbered banks.

 

The banking method uses a very large number of hotspots, mostly in the $0400-$0FFF range. Reads from these addresses do not affect anything in the 2600(*), so hotspots there do not waste address space. The range $1FF0-$1FFF are also hotspots.

 

For the following hotspot descriptions note the following:

 

-1- SCK is normally low, but goes high when certain hotspots are accessed

 

-2- The lower banking bit is wired to SDA. This means the EEPROM sees changes to the lower banking bit, and that the EEPROM can jam the lower banking bit.

 

-3- Changes to the lower banking bit are delayed by a cycle

 

-4- Use of the BIT instruction to skip code is dangerous because it may accidentally read hotspots. For example, using "BIT" to skip over "LDA #$08" would result in a read of $08A9, triggering an I2C clock and possible bankswitch.

 

Hotspots:

 

$1FF0-$1FF7 -- Drive clock high for a cycle, then set lower banking bit

$1FF8-$1FFB -- Drive clock high for a cycle, then clear lower banking bit

$1FFC-$1FFF -- Select bank zero (do not affect clock)

 

$0800-$08FF -- Drive clock high for a cycle; copy A0 to lower banking bit

$0900-$09FF -- Drive clock high for a cycle; copy A1 to lower banking bit

$0A00-$0AFF -- Drive clock high for a cycle; copy A2 to lower banking bit

$0B00-$0BFF -- Drive clock high for a cycle; copy A3 to lower banking bit

$0C00-$0CFF -- Drive clock high for a cycle; copy A4 to lower banking bit

$0D00-$0DFF -- Drive clock high for a cycle; copy A5 to lower banking bit

$0E00-$0EFF -- Drive clock high for a cycle; copy A6 to lower banking bit

$0F00-$0FFF -- Drive clock high for a cycle; copy A7 to lower banking bit

 

$0400-$04FF -- Drive clock high for a cycle; copy A5 to lower banking bit

$0500-$05FF -- Keep clock high if it was on previous cycle (no other effect).

Note: Banking change from previous cycle will take effect during this one.

$0600-$06FF -- Copy A5-A7 to banking bits (do not drive clock)

Note that if code from bank 0 is RORG'ed to $1000, bank 1 to $3000, etc. up to

bank 7 at $F000, storing the MSB of an address here will switch to the proper

bank.

$0700-$07FF -- Copy A7 to lower banking bit, but do not drive clock high

 

Most operations will drive SCK high and low and then update SDA. It's possible to update SDA without hitting SCK by using a banking address at $06xx. To change SDA while SCK is high, perform an indexed operation to $04xx in such a way as to cross a page into $05xx. SCK will be held high until the end of the $05xx address, but value of SDA set by the $04xx access will take affect at the beginning of it.

 

Anyone think this sort of thing sounds interesting?

 

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