TomSon Posted January 26, 2017 Share Posted January 26, 2017 (edited) First off: hi to everyone on this forum - I am brand new to VCS programming and have extensive low-level hw programming background, (also programming retro hw) but so far not on the 2600. So, just now I stumbled upon a possible bug in Stella - the reset SP is according to this document: http://www.pagetable.com/?p=410 at 0xFD but in Stella it is 0xFF. Since every cart. on the planet seems to init. the stack right away anyways this is not a big deal but still.. p.s. void M6502::reset() SP = BSPF::containsIgnoreCase(cpurandom, "S") ? mySystem->randGenerator().next() : 0xff; Edited January 26, 2017 by TomSon 3 Quote Link to comment Share on other sites More sharing options...
TomSon Posted January 26, 2017 Author Share Posted January 26, 2017 I just verified that SP is indeed FD starting a test bin on a 2600 in a ROM so this is a bug. It may even be a bug of the harmony cart. depending on how they init the sp before starting the loaded cart.: I do not have one myself to test this - and I don't know how to attach my test_sp.bin here (yet..). Quote Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted January 26, 2017 Share Posted January 26, 2017 (edited) Either zip it, or renamed it, e.g. to bin.txt Interesting finding. Please post this here too. More evidence: http://visual6502.org/JSSim/ http://www.youtube.com/watch?v=fWqBmmPQP40) (around 42:15) Edited January 26, 2017 by Thomas Jentzsch Quote Link to comment Share on other sites More sharing options...
Nukey Shay Posted January 26, 2017 Share Posted January 26, 2017 I wonder what it is when 7800 begins 2600 mode. Could become a shortcut for console type detection 1 Quote Link to comment Share on other sites More sharing options...
DirtyHairy Posted January 26, 2017 Share Posted January 26, 2017 (edited) This is a very interesting find I have already observed that some official ROMs fail to init S properly and may fail with a corrupted stack, depending on the value of S (Dark Chambers for example). This (1) proves that the value is determinstic and (2) also fixes the value. I'll open a ticket against Stella, and I'll also fix this in 6502.ts. Edited January 26, 2017 by DirtyHairy 1 Quote Link to comment Share on other sites More sharing options...
+SpiceWare Posted January 26, 2017 Share Posted January 26, 2017 I do not have one myself to test this - and I don't know how to attach my test_sp.bin here (yet..). You have to click on More Reply Options to get to the file attachment options, they'll appear below the text box: Do note that if you have Flash installed the Attach Files options will look different. Also BIN files can be uploaded just fine, no need to zip or rename them. Quote Link to comment Share on other sites More sharing options...
TomSon Posted January 26, 2017 Author Share Posted January 26, 2017 (edited) Quick test to see whether SP is correct after reset, displays either an orange screen if correct or black one if SP != FD. ORG $F000 START_FLAG .byte 0 ;############################################################## ; ; Reset handler - clears all mem. and regs and inits ; the static regs/mem ; ;############################################################## Reset: tsx cpx #$fd beq Reset2 CLEAN_START reset_entry STA COLUBK ;3 JMP frame_handler Reset2 CLEAN_START LDA #ORANGE ;2 jmp reset_entry frame_handler: LDA #$02 ; A = VSYNC enable STA WSYNC ; Finish current line STA VSYNC ; Start vertical sync STA WSYNC ; 1st line vertical sync STA WSYNC ; 2nd line vertical sync ldy #37 LDX #$B0 ;2 LSR ; A = VSYNC disable STA WSYNC ; 3rd line vertical sync STA VSYNC ; Stop vertical sync vblank sta WSYNC dey bne vblank sta WSYNC STA VBLANK ;3 SET_COLOR0 STX HMP0 ;3 STX HMP1 ;3 ldx #11 norom stx WSYNC dex bne norom sta WSYNC ldx #180 norom2 stx WSYNC dex bne norom2 LDA #$42 ;2 sta WSYNC STA VBLANK ;3 ldx #27 overscan: sta WSYNC dex bne overscan beq frame_handler frame_handler_end: ORG $FFFA .word Reset ; NMI .word Reset ; RESET .word Reset ; IRQ tst_sp.bin Edited January 26, 2017 by TomSon 2 Quote Link to comment Share on other sites More sharing options...
Nukey Shay Posted January 26, 2017 Share Posted January 26, 2017 Why a 4k rom? BTW test fails on the Flashback portable. 1 Quote Link to comment Share on other sites More sharing options...
TomSon Posted January 28, 2017 Author Share Posted January 28, 2017 Why a 4k rom? BTW test fails on the Flashback portable. hehe, every byte counts, I know But that's actually a good hint - I myself don't have a rom < 2k and have not checked whether they exist and how they are treated in Stella. I assume it's just mirrored in the entire 4K and a 4K mapper used. Very interesting that it fails on the flashback portable. I'd be also interested to know whether the Harmony does the same thing (I really have to order one asap myself). I am investigating bank switching in general and initializations in particular in the moment which is why this came up - the FE one is automatically set to bank 1 by the reset mechanism of the 6502 (the reset vector fetch looks just like a jsr fffc when just snooping the cart. bus) which makes this 8k bank switch even more elegant in my eyes. Quote Link to comment Share on other sites More sharing options...
Thomas Jentzsch Posted January 28, 2017 Share Posted January 28, 2017 I am pretty sure it fails on Harmony, since it doesn't care for registers, flags or ZP-RAM. It relies on the ROM initializing correctly. Quote Link to comment Share on other sites More sharing options...
alex_79 Posted January 28, 2017 Share Posted January 28, 2017 By looking at the 7800 bios source, the Stack Pointer is set at startup, and its value is $FF when starting a 2600 cart. I used a simple test rom that displays the initial value of SP (loaded into the Harmony Cart in single-cart mode) which confirms that. On a 2600 the value is indeed $FD.Loading the rom from the Harmony menu (firmware NTSC 1.06 beta), the SP value seems to always be $07. SP.bin 2 Quote Link to comment Share on other sites More sharing options...
alex_79 Posted January 29, 2017 Share Posted January 29, 2017 I forgot about this test rom posted by Omegamatrix a while ago: https://atariage.com/forums/topic/230219-startup-values-of-the-2600/ It shows the startup values of the entire ram and processor registers Quote Link to comment Share on other sites More sharing options...
+stephena Posted February 24, 2017 Share Posted February 24, 2017 This is now fixed, and will be part of Stella-5.0-pre5. 1 Quote Link to comment Share on other sites More sharing options...
Nukey Shay Posted February 24, 2017 Share Posted February 24, 2017 Is it $FD in the various 2600 knockoffs and adaptors, as well? Quote Link to comment Share on other sites More sharing options...
alex_79 Posted July 30, 2019 Share Posted July 30, 2019 (edited) I'm resurrecting this thread, as further testing that I've done recently actually contradicts the fact that the Stack pointer has a definite value at startup. I tested 5 different consoles, with CPU manufacturing dates ranging from 1980 to 1991 and SP is not constant. A couple of consoles (including the one I briefly tested in 2017 and that initially seemed to confirm the theory) return $FD more often, sometimes for several power cycles in a row, but eventually will result in different values as well. The other 3 consoles return more random values, changing on each power cycle. All the sources linked in this thread are based on the Visual6502 simulator, which happen to start always in the exact same state. Not only for SP, but all the registers and flags have always the same value there. The MOS 6500 Programming manual, on the other hand, clearly states: While the reset line is in the low state, it can be assumed that internal registers may be initialized to any random condition; therefore, no conditions about the internal state of the microprocessor are assumed other than that the microprocessor will, one cycle after the reset line goes high, implement the following sequence[...] The reset sequence decrements SP 3 times and will result in SP=$FD only if the register was 0 initially. Which is possible, and might seem to happen consistently on individual CPUs, but cannot be assumed as a general behavior. -------------------------- P.S. the test rom I attached at the time a few posts above has a bug: it doesn't clear the decimal flag. If D is set (and happened a few times in my tests, as it's undetermined after a reset too) the result is garbled gfx. Here is a fixed rom: SP_startup_value.bin Better yet, use this rom by Omegamatrix, that displays startup values for zeropage ram and all CPU registers Edited July 30, 2019 by alex_79 1 Quote Link to comment Share on other sites More sharing options...
Omegamatrix Posted August 7, 2019 Share Posted August 7, 2019 Well that is good to know. I wouldn't have depended on the SP being at $FD for a normal game, but I did with the 32 byte demos we did last year Quote Link to comment Share on other sites More sharing options...
+SvOlli Posted August 7, 2019 Share Posted August 7, 2019 (edited) The 32 bytes demos was what came to my mind when I was toying around with the "Startup Values" cart on different hardware. But since we used that trick not do clean up RAM (that wasn't used anyway), but only to clean up the TIA, it would have worked in far more than 99% of my tests, since the SP would have to be less than $27 and A would have to have the top bit set to leave an unexpected mark. And even in this case you would just wonder and turn it off and on again. But the only thing that I found "stable" after a reset was that the interrupt disable flag was set. BTW: Omegamatrix, would you care to update "Startup Values" with dumping out RIOT's I/O as well? Edited August 7, 2019 by SvOlli Name typo Quote Link to comment Share on other sites More sharing options...
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