What if? Designing "Geneve 2020". Cool 3D views!

[+FarmerPotato]

On 11/10/2023 at 9:05 AM, Jimhearne said:

Very strange it starts ok and then stops.

What do the 2 pins do when it stops.

I'm sure you've checked but it's not loosing the 5V supply after 3 seconds ?

Both ground pins connected on the 99105 ?

 

I read a lot about crystals and the Pierce oscillator. I understood that the oscillator works when there is sufficient capacitance on the pins to cause >180 degree phase shift somewhere near the crystal's parallel resonant frequency.  But as it approaches 180, the shifted output will also be attenuated. The system only oscillates if there is enough gain in the driving loop. For a CMOS or NMOS driver, this I guess means the inverter gate input-output is the amplifier, and there is only a gain if the gate's Vih and Vil are met, and Voh and Vol result in a net gain. If not, the oscillator fails and you get a DC signal.

 

The steady state of an oscillator is when the amplifier gain overcomes the attenuation AND the signal has 180 degree phase shift.

 

It turns out that the steady state for a Pierce oscillator, which is a series resonator, is found at a slightly higher frequency than the quoted one.

 

All errors in the above are my own.  I am still confused as to why you can buy a crystal to use at a recommended external (18 pF) capacitiance or in a "S" series configuration.

 

All good

 

My fix was to start over with a name-brand crystal. The board is happily oscillating with NO added caps. ECS part number ECS-120-18-4X-CKM.

Phase is not exactly 180. Yellow XTAL2 is a bit ahead of that.

 

Bad News

 

Bleh, it started failing again with two 5 pF caps.. 

 

I got the scope to trigger at the point where XTAL1 fails.

 

First of all, XTAL1 is getting a DC offset in groups of 4 cycles (which is one instruction cycle.) My scope probes are grounded at VSS right next to XTAL1, XTAL2/CLKIN.  So I don't think it is my probe.  The probes DEFINITELY increase the capacitance at the pins, and can make the amplitude of oscillation exceed 5 Vpp.  I tracked CLKOUT instead but it still fails after 10 seconds. 

 

At the point of failure, XTAL1's DC offset trends down. Instead of oscillating in [1,4] V, it drops 1 V and goes negative at least once. Oscillation dies and the DC offset slumps to 0 in a few hundred microseconds.  (I capture this by triggering on XTAL1<0.1V for width > 100 microseconds.)

 

My new guess is CRAPPY PCB LAYOUT.   To squeeze in the very last feature,  I moved the XTAL traces inside the CPU footprint. I thought it was good to make them shorter.  

 

However, that VIA next to pin1 of the crystal is CLKOUT, jumping over it. Today I soldered the new crystal and 5 pf caps directly under the CPU socket because the thru hole pads and SMT cap pads were ruined. (I then lowered my soldering temperature.)

 

Now there are little stubs left.  One of them is XTAL1. My theory is, it acts like a little antenna, right next to CLKOUT, but shifted 180 degrees off. There's no ground fill separating them. 

 

If the XTAL1 pin is picking up crosstalk from CLKOUT, *out of phase*, that could be bad for the oscillator. On the other hand, traces cross at a right angle, so coupling is minimal.

 

Millisecond Scale

 

 

Microsecond Scale

 

 

 

[+FarmerPotato]

Different 99105 chips behave not too different. 

Fail also with the probe attached at: CLKOUT, CLKOUT/2 (flip flop)

 

J1 ran for 4 minutes on cold and warm start. 

 

J1  8842 PHILIPPINES - used in prior 2 boards

J2 8925 TAIWAN

P1 9123 TAIWAN

T3 8445 ENGLAND

 

ID by source:  P = Polida(ebay), J = Jbdigriz, T= tvsat

 

I checked the bypass 0805 0.1 uF at the CPU's Vcc. 

 

 

[Jimhearne]

Maybe it isn't supposed to have the added caps, the datasheet is a bit unclear if it's talking about added caps or just the internal capacitance in the chip.

I assumed the former till now.

There is another home made 99105 system on the net besides Stuarts and he doesn't seem to have put any caps on the crystal.

Is it stable without them ?

tms99105a_sbc (1).pdf

[+FarmerPotato]

Thanks for posting the schematic, can you add the original link?  It is not showing any caps. 
 

So far I have tried:

12 MHz 5 pF

12 MHz 12 pF

12 MHz 18 pF

12 MHz 33 pF

(all tantalum, radial)

Doesn't seem to make much difference. Cold start runs longer.

The ECS-120-18 is for 18 pF. In their app note, it says to double this for each cap. 
 

9995 data book said 12 MHz 15 to 35 pF with 25 ? pF nominal. 
 

I made  SIP4 headers that I could quickly solder under the DIP40, to pins XTAL2/CLKIN, XTAL1, CLKOUT, Vss. With test loop on CLKOUT. 

 

Next in order: test the HC04 onboard Pierce oscillator. Try the TI LVC1404 chip. Give up and buy canned oscillators.
 

Meanwhile study the math.  Forgot everything from college as I never put it to practical use. 
 

 

[Jimhearne]

It was from a site I had saved on my hard drive but i found the original site https://itech.net.au/tms9900/

Does yours stay running with no caps ?

I assume you meant ceramic not tantalum caps, i don't think tants go that low.

 

 

 

[+FarmerPotato]

1 hour ago, Jimhearne said:

It was from a site I had saved on my hard drive but i found the original site https://itech.net.au/tms9900/

Does yours stay running with no caps ?

I assume you meant ceramic not tantalum caps, i don't think tants go that low.

 

 

 

Uh, right. Obviously ceramic disc type. They are from a no-name assortment of 3-47 pF thru-hole disc caps. My first two boards used 33s from that set. 
 

My SMD 0805 book starts at 47 pF. 
 

No, same problems with no caps at all. 
 

I bet there is something to that negative dip. 

Hypothesis

 

In the Pierce oscillator, the inverter is supposed to operate in the transistor's active mode. Providing net gain, but not binary high or low.

 

So if XTAL2 goes  low enough, the inverter "latches". If it's NMOS, it sinks current in the low state. Anyhow it discharges the cap toward 0V faster than the  crystal's positive-going voltage.
 

I think that's what I see on the scope capture: at the end, XTAL2's amplitude shrinks while touching zero on each cycle.  

So I guess that I have a problem with noisy ground rail. 

[Stuart]

On 11/12/2023 at 8:04 PM, Jimhearne said:

Maybe it isn't supposed to have the added caps, the datasheet is a bit unclear if it's talking about added caps or just the internal capacitance in the chip.

I assumed the former till now.

There is another home made 99105 system on the net besides Stuarts and he doesn't seem to have put any caps on the crystal.

Is it stable without them ?

tms99105a_sbc (1).pdf 359.48 kB · 8 downloads

For my 99105 board, I followed the statement in the "The 99000 Microprocessor - Architecture Software and Interface Techniques" book - "Note that shunt capacitors are required for each of these [crystal connection] terminals to ground. C1 and C2 each have a typical value of 5pF."

 

Have you tried one of the "full height" (~11mm tall) crystals, rather than the half-height ones?

 

 

[+FarmerPotato]

On 11/13/2023 at 3:06 PM, Stuart said:

For my 99105 board, I followed the statement in the "The 99000 Microprocessor - Architecture Software and Interface Techniques" book - "Note that shunt capacitors are required for each of these [crystal connection] terminals to ground. C1 and C2 each have a typical value of 5pF."

 

Have you tried one of the "full height" (~11mm tall) crystals, rather than the half-height ones?

 

 

Thanks!  I had not yet tried full-height but I will.

 

I've been trying to read Statek TN#30 and TN#31. The procedure to take measurements of your oscillator: measure drive current across the crystal, more.  I'd like to do be able to measure current to see how a 5 pF shunt cap acts as a low-pass filter.

 

 

[+FarmerPotato]

Here's what I got last night and today. Bought a variety of ECS and CTS crystals, oscillator, DIP-8 can, 12 MHz and 24 MHz.

 

CPU XTAL1/CLKIN is not going well.  But my Pierce oscillator (HC04) works.

I first connected the 12 MHz oscillator can to XTAL1/CLKIN.  

 

The CPU CLKOUT only runs for a few seconds, then I see the CLKIN amplitude fall. Just like when I had a crystal, though the oscillator continues to drive Vpp ~ 0.3V.

 

 

Red is CPU CLKOUT.

Then:

(Vertical division 5V here, not 1V)

 

So, the oscillator leaves me with the same problem.  There is something wrong elsewhere.

 

I removed the CPU and saw this:

 

 

 

Red is the BST3 pin. Maybe it's just my two probes interacting?  I did not find this signal at any other point nearby.

 

Here is the same, but full bandwidth, AC coupled (I've been using 20 MHz bandwidth limiter, and DC coupling all along.. bad idea for crystals)

 

 

Putting the CPU back in

 

It runs for about a second, then the 99105 is putting out CLKOUT at ~ 0.3 Vpp.

 

Red is CLKOUT AC coupled.  Yellow is CLKOUT DC coupled.

 

 

 

[+FarmerPotato]

Pierce oscillator

 

Over at my Pierce oscillator circuit (HC04), the outcome is more encouraging!  I soldered the 3 MHz Serial type and measured the crystal and output clock.

 

Red is 9902 clock pin, yellow is the crystal.

 

 

 

Only problem:  this is 9 MHz.

 

I've managed to filter the 2nd mode of the crystal. Whaaat...

Edited November 16, 2023 by FarmerPotato

[Jimhearne]

So even with a crystal module the signal at CLKIN fades away after a few seconds ?

If so, all i can think off is power or ground problems on the processor or the board, a faulty processor, or there is something else connected to the CLKIN circuit that is dragging the signal down.

And if you remove the processor the CLKIN signal stays up ?

Oh, did you check if the crystal module has an enable pin, if it has is it tied to the enable state and not floating ?

 

 

 

[+FarmerPotato]

3 hours ago, Jimhearne said:

So even with a crystal module the signal at CLKIN fades away after a few seconds ?

If so, all i can think off is power or ground problems on the processor or the board, a faulty processor, or there is something else connected to the CLKIN circuit that is dragging the signal down.

And if you remove the processor the CLKIN signal stays up ?

Oh, did you check if the crystal module has an enable pin, if it has is it tied to the enable state and not floating ?

 

 

 

Yep and yep. Got the No Enable variety. Tried several CPUs. With no CPU, oscillator runs. 
 

EDIT: deleted BST3 theory 

 

I learned the name for this: latch-up. If it happens in NMOS. The cause can be a negative undershoot to -0.7. I captured an undershoot event but had bandwidth limit 20 MHz so it could be worse. 

 

 

 

 

Edited November 15, 2023 by FarmerPotato

[Stuart]

Can you cut the CLKOUT signal trace just before it splits at the second via, in case something downstream is pulling it low? See if it is then stable?

[Jimhearne]

I wouldn't have thought anything you did on CLKOUT would have an effect on CLKIN ?

Also, I'm pretty sure latchup is just a CMOS thing.

And what you are seeing on the scope is probably just less than ideal earthing, scope probes etc 

To get decent waveforms at that sort of frequency you have to ditch the earth lead on the scope probe and use the little spring that comes with more expensive scope probes that earths right next to the tip, assuming you have an earth there.

I spent quite some time in the past chasing poor waveforms and noise that were really just down to the scope setup.

 

[+FarmerPotato]

Tonight's findings:

 

I put a resistor on the oscillator drive to XTAL1/CLKIN. So so happy that I made a little proto area on the board!

Attenuated to 1-3V and CLKOUT runs ok.

 

To measure current, I switched from the ATX supply, to my bench supply.

 

From "hot" after testing, it was taking 900 mA then > 1A (bench supply cutoff.)  CLKOUT failed, but oscillator is going fine. 

 

Removed 9901, last DIP I can pull. Current came in at 970 mA, then hit cutoff > 1A. Clock died.

 

I let it cool down.  Now it has run 5 minutes on 650 mA.  Now 610 mA.  Somewhere something is shorting...

[Jimhearne]

Yes, sounds like something is taking too much current.

As a comparison this whole board takes 540mA

Do you have any Tantalum caps on the board, sounds a bit like a reversed Tant does.

If it's on a current limited supply they don't always go dead short like they tend to on PC's, they can just draw more and more current until the supply shuts down.

 

Interestingly, i hooked up my board initially to the full E-Bus backplane and it was drawing around 1 amp but half of that was just the termination resistors on the full backplane, lots of 270R/330R between the rails, so i switched to the prototype backplane which doesn't have any termination.

 

Edited November 16, 2023 by Jimhearne

[Jimhearne]

Oh, i looked back at your pictures, are you powering up just the processor board or is it on your backplane ?, it looks like you have termination on the bus as well so i guess it's a fairly similar setup to mine.

[+FarmerPotato]

6 hours ago, Jimhearne said:

Oh, i looked back at your pictures, are you powering up just the processor board or is it on your backplane ?, it looks like you have termination on the bus as well so i guess it's a fairly similar setup to mine.

Just the processor so far. Makes my life simpler. 
 

I avidly read the E-Bus Systems Handbook, really appreciated the backplane calculations. Also looked at the TM990 books for termination.  

So, 270/330 for 8 mA per bus line, that quickly adds up to >250 mA current.  

 

TI's NuBus specified mostly 330/470 termination. 

 

I wonder if I've got the  bus drivers disabled,  enabled,  floating? Didn't probe over there yet (should not have put the chips in at this stage!)

 

[+FarmerPotato]

19 hours ago, Jimhearne said:

Yes, sounds like something is taking too much current.

As a comparison this whole board takes 540mA

Do you have any Tantalum caps on the board, sounds a bit like a reversed Tant does.

If it's on a current limited supply they don't always go dead short like they tend to on PC's, they can just draw more and more current until the supply shuts down.

 

Interestingly, i hooked up my board initially to the full E-Bus backplane and it was drawing around 1 amp but half of that was just the termination resistors on the full backplane, lots of 270R/330R between the rails, so i switched to the prototype backplane which doesn't have any termination.

 

This is a beautiful card!  So minimal... mine is crammed with too much stuff.

 

With that big Altera, did you implement a lot of special functions? Bus arbitration?

 

How are the 41612 connectors reaching 64 traces? Can pins go through the proto and not short out?

 

[Jimhearne]

Thank you, i thought you had seen my board before.

Edited November 17, 2023 by Jimhearne

[Jimhearne]

Thank you, i thought you had seen my board before.

I must get back to it, I've been distracted from it by all the TM990 stuff I've been playing with.

The CPLD is doing all the stuff that would have been done with descreate logic controlling address decoding and the E-bus control.

I'm not trying to do multi processor so it doesn't support that but it does do everything else on the E-Bus

The CPLD start off as a Altera EPM7128 in a PLCC package but as i added extra features i maxed that out and then maxed out the biggest CPLD in that series.

So i had to switch to a EPM7512 which is a 3.3V device but with 5V compatible I/O, the adaptor board has a 3.3V reg on the back.

Unfortunately trying to emulate the  612 memory mapper in the CPLD takes up a lot of cells (CPLD Are not good for latches / memory as i've found) and i've maxed out so i will have to have a cut down version.

The prototype backplane is 2 layers of veroboard stuck back to back, one set of pins is soldered on the top, the other set pass through the top layer and where they pins pass through the copper is chamfered with a drill bit to make clearance for the pins but not enough to cut the tracks.

 

Edited November 17, 2023 by Jimhearne
Keep pressing Ctrl enter thinking i'm on facebook !

[Jimhearne]

Sorry, don't want to hijack your thread.

Some quick pictures of my video card and a multi i/o Card, Floppy, IDE, serial , parallel, RTC card, and the proper backplane.

Again one CPLD on each card is doing all the address decoding, E-Bus control etc. 

The I/O board has a space for a PIC which won't be on the next version, i was going to use it for PS2 keyboard and mouse but then realised i can implement the PS2 interface in the CPLD and i've moved the keyboard/mouse to the video card.

Any caps and resistors needed are SMT on the rear of the boards which is why the boards look quite clean but i think still look retro.

 

You can do the same back to back veroboard trick to make quick extender cards for DIN connectors.

[+FarmerPotato]

5 hours ago, Jimhearne said:

 

The CPLD is doing all the stuff that would have been done with discrete logic controlling address decoding and the E-bus control.

 

I'm not trying to do multi processor so it doesn't support that but it does do everything else on the E-Bus

The CPLD start off as a Altera EPM7128 in a PLCC package but as i added extra features i maxed that out and then maxed out the biggest CPLD in that series.

So i had to switch to a EPM7512 which is a 3.3V device but with 5V compatible I/O, the adaptor board has a 3.3V reg on the back.

Unfortunately trying to emulate the  612 memory mapper in the CPLD takes up a lot of cells (CPLD Are not good for latches / memory as i've found) and i've maxed out so i will have to have a cut down version.

The prototype backplane is 2 layers of veroboard stuck back to back, one set of pins is soldered on the top, the other set pass through the top layer and where they pins pass through the copper is chamfered with a drill bit to make clearance for the pins but not enough to cut the tracks.

 

 

Aha!  Brilliant, I will chamfer some holes when I need to solve that problem.  I started on wire-wrap, bare perf-board, and a wire-wrap DIN-41612 from Vector. That plugged into the ready-made ECB backplane.

 

I know about filling up CPLD -my first learning experience used one 22V10 (10 flip flops) to replace a 259 (two bank registers) and 3 other chips.  Would not do that again. This board's logic is squeezed into two 22V10s, combinatorial only.  Mode bits are output from the 9901.

 

Next version will use external RAM to replace the LS612, controlled by a XC9572XL.

 

Like you found, the PS/2 interface is easy in FPGA, and my only FPGA is on the video card, so PS/2 has to live there too.

 

Did you implement the E-Bus interrupt code latch?  That was new to me, but it's in NuBus too.  The P-Box had a SENILA, SENILB sensing scheme designed, never used, and I ended up using that for now.

 

 

[+FarmerPotato]

Set back today... prepared to write Flash chips, but my TL866-II is damaged and I cannot find the T56 after the move.

 

Whoops\.. The TL866 was in the T56 box, the T56 was in the old TL866 box.

 

 

Memory and 9902 test installed.  No time to do the PLD

 

Current maybe rose 20 mS, to 670, maybe nothing.  Unfortunately it's not stable; goes to 900 then 999 and dies.

[Jimhearne]

My TL866-II died a few months ago as well, or rather it partly died , it started failing some logic chips (74244, 245 etc) on a specific pin but it will still read and program EPROMs  

I spent a few hours trying to fix it but couldn't find any difference in signals between the pins that were passing and the one that failed so maybe internal to the processor.

So i bought a T56