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Pokeymax v2


foft

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1 hour ago, foft said:

As for this sio problem, not sure what is going on if you tried the capacitors and resistors and have the latest core. Do you have an oscilloscope?

Yep I have an oscilloscope. Directions on the kind of things to check would be gratefully received. 
 

 

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I spent a little time this evening scoping the serial IO pins on the PokeyMax in both machines and I struggled to see a difference. SIO just randomly stalls in the bad machine and can often be restarted by hitting break. 
 

In desperation I decided to revert the board to stock except the PokeyMax. I removed the VBXE first and reinstated the legacy system clock as I had suspicions that the odd behaviour was a timing issue but there was no change. 
 

Next I removed the U1Mb. This seemed to make things a little better, but I was still seeing stalling SIO almost all the time. 
 

Clutching at straws I swapped the CPU from the other test machine in. And voila! SIO problems are (almost*) history. 
 

So I need to put the other CPU into the stock test machine and see if SIO fails there. 

 

I’ve now put the U1Mb back in and all seems well. Just about to reinstall VBXE. 
 

 

* I say almost because I’ve seen one or two stalls with the new CPU, but it’s a massive improvement. I’ll do more testing over the weekend. 

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OK - short story - it’s all working fine now 🤣 
 

The long story is about a day’s work. 

 

I decided to take the board back to stock as there were some decidedly odd things happening. In the process I ended up with a non booting board, brown screen. Checked all the custom chips, mmu, OS ROM etc in a spare board - all good. Checked clocks via scope - all present. Could see activity on address lines. The DRAMs on the board were already socketed so I pulled them to test in my RCT pro. And there was the problem. 50% of the RAM was borderline (testing OK on 1 pass then bad on another) or just bad!

 

Turns out a fair bit few of my spares test out as bad too 🙁 Well they have been on the shelf a while!
 

Finally found enough good RAM and put the board back together as stock. All good, booting up to READY. 
 

From there I added one upgrade back at a time testing as I went. PokeyMax went in last. System seemed stable. Definitely not seeing stalling SIO I had previously. 
 

Tested a couple of stereo games and demos (including Numen) at standard and high speed SIO and all looked good.
 

Decided to push my luck and reflash the PokeyMax to Stereo + Covox (from Quad Pokey). Flashed the core and moved the address line and all good. Tested with a couple of Covox demos. 
 

it’s taken a bit of work but I’m finally there. 800XL with U1Mb, VBXE, Side2 and PokeyMax (Stero plus Covox). This is pretty much my ‘dream’ machine as far as daily use goes and I’m already enjoying it. 
 

Thanks everyone for the support and suggestions when things weren’t working and thanks to the folks who continue to create amazing upgrades and software for these machines. 

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Hi @foft,

 

I was playing som AtariSid songs from this AA post, and I noticed some noise in the playback that I did not hear in Altirra. When I play Commando, I hear like high pitched whine in the background.  I am going to hook up one of computers that has a real Pokey to see what I get. If you have a moment, can you this check it out? Maybe I have to adjust my settings with the config utility?

 

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3 hours ago, foft said:

Interesting. Could you record a flac with Altirra vs pokeymax vs pokey please?

Yes sir! I have one for Altirra, Pokeymax and Real Pokey. They were all recorded with same sound capture hardware.

Commando Altirra.flacCommando Pokeymax.flacCommando RealPokey.flac

Edited by scorpio_ny
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Thanks. I have a cycle exact test harness to compare the digital part. I should figure out the simplest possible pdm like pattern to verify, so I can add it to my set of tests. What is a typical pattern of writes/ critical timings for pdm?

Edited by foft
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6 hours ago, foft said:

Thanks. I have a cycle exact test harness to compare the digital part. I should figure out the simplest possible pdm like pattern to verify, so I can add it to my set of tests. What is a typical pattern of writes/ critical timings for pdm?

This should be the pertinent part of the init:

 

73314798 write AUDCTL = $65
73314857 write AUDF1 = $03
73314862 write AUDF3 = $05
73315141 write SKCTL = $00
73315145 write STIMER = $00
73315151 write SKCTL = $03
73315155 write AUDF3 = $03

 

Note that the high-pass logic has a sub-cycle propagation delay. Altirra approximates this in its audio pipeline by running half cycles to get a 1.5 cycle delay from high to low timer.

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  • 5 months later...

I still have an older V2 PokeyMax (no 2b). This requires 10 uF electrolytic capacitors at the audio connections. Can I use tantalum capacitors instead of the electrolytic capacitors? These would be smaller.

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I think you can probably get away with almost any capacitor of approximately the right capacitance. Probably there is an optimum type/diametric with the best properties but I’d challenge anyway to tell me which is which with a blind test.

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