Corcomp 9900 MES - Disk Controller + 32K Board Recreation

+acadiel · March 26, 2022

I'll see if @OLD CS1 can split the replies from the other topic off into this one where I veered off into redoing this PCB.

I finally got my (ouch, expensive) Dataman 48PRO2 programmer in today. It's quite an upgrade from my BK Precision 844USB (which will be going up for sale to help pay for this new one.)

U9 and U10 were unprotected PLS153 chips. I've attached their JED files below. This is for the disk controller section.

U11, the AMPAL16R4A(PC) did read (see snapshot), but it says one fuse was blown. I have no idea how to interpret this. But I didn't get all zeros nor all 1's. I don't know if someone can reverse engineer this to see if it actually is legitimate or not. U11 is for the 32K RAM portion.

In the meantime, I can now read/write a LOT of rare chips. Need to pay back this programmer somehow, so feel free to ping me if you need anything rare like PAL/GALs or such read or written: Dataman-48Pro2 Version 3.75 <ALL> Device List

corcomp_U10_PLS153N.jed corcomp_U9_PLS153N.jed corcomp_U11_AMPAL16R4A(PC).jed

humeur · March 27, 2022

Thank .

+acadiel · March 27, 2022

Thank .

Pas de quoi :-)

Fritz442 · March 27, 2022

Yes your U11 (UB3A) file is correct and working, I burned it to a Lattice GAL16V8D.

All three files are in my PAL/GAL repository here:

Edited March 27, 2022 by Fritz442

+acadiel · March 27, 2022

1 hour ago, Fritz442 said:

Yes your U11 (UB3A) file is correct and working, I burned it to a Lattice GAL16V8D.

All three files are in my PAL/GAL repository here:

Thanks for verifying! It saves me from having to purchase a chip and program it to test. If someone can translate these images to standard available GAL formulas and test them and put them in that thread, it would be awesome.

I’m also curious if these chips are similar to the ones in the Corcomp PEB cards. Now that we have them, I can continue to work on this PCB and we can make some for those owners with missing Disk/32K!

Fritz442 · March 27, 2022

The CC PEB card chips(JEDEC's) are completely different. All three in my repository (U9,U10,U11) can be written to GAL16V8's

and used in the Micro Exp System boards. Your other two U9 & U10 are a different jedec format.

+acadiel · March 27, 2022

3 hours ago, Fritz442 said:

The CC PEB card chips(JEDEC's) are completely different. All three in my repository (U9,U10,U11) can be written to GAL16V8's

and used in the Micro Exp System boards. Your other two U9 & U10 are a different jedec format.

Could it be because my U9 and U10 are PLS153 PLD ICs?

If your U9 and U10 can be written and placed into my MES on GAL16V8, then I'm guessing the logic in the U9 and U10 PLS153 dumps is the same, but using a different JEDEC bitstream because of the differing ICs?

Can we translate the JEDEC formulas between the two to ensure they're comparable? I did tell my programmer to save in .JED format, and there were no options to set, so I thought it was a standard .JED file.

There are jumper wires from what @humeur and I found that go to the PLS153's. So, I'm guessing we need to find someone using the non-PLS153's in U9 and U10 and get pictures of their PCBs and jumpers/straps.

Edit: I did find this: https://www.jrok.com/hardware/ff_pls153/foodfight_pls153_to_GAL.htm

+acadiel · March 27, 2022

D:\OneDrive\Personal\Downloads\Projects\corcomp>jedutil -view corcomp_U9_PLS153N.jed PLS153
Inputs:

1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19

Outputs:

12 (Combinatorial, Output feedback output, Active low)
13 (Combinatorial, Output feedback output, Active low)
14 (Combinatorial, Output feedback output, Active low)
15 (Combinatorial, Output feedback output, Active low)
19 (Combinatorial, Output feedback output, Active low)

Equations:

/o12 = i2 & i4 & i5 & i6 & i8 & i9 & /i11 & i17 & i18
o12.oe = vcc

/o13 = /i2 & i3 & /i4 & /i6 & /i8 & /i9 & /i11 & i16 & i17 & /i18
o13.oe = vcc

/o14 = i1 & i2 & i4 & /i5 & i6 & /i7 & i8 & i9 & /i11 & i17 & i18 +
       /i1 & i2 & i4 & /i5 & i6 & i7 & i8 & i9 & /i11 & i17 & i18
o14.oe = vcc

/o15 = /i11 & o13 & o14 & i16 & i17 +
       /i11 & o14 & /i16 & i17
o15.oe = vcc

/o19 = i3 & /i16
o19.oe = vcc

U9 ^^


D:\OneDrive\Personal\Downloads\Projects\corcomp>jedutil -view corcomp_U10_PLS153N.jed PLS153
Inputs:

1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 19

Outputs:

13 (Combinatorial, Output feedback output, Active low)
18 (Combinatorial, Output feedback output, Active low)

Equations:

/o13 = i1 & i2 & /i3 & /i4 & i5 & i6 & /i9
o13.oe = vcc

/o18 = /i8 +
       /i7 +
       /i11 +
       /i12
o18.oe = vcc

U10 ^^

D:\OneDrive\Personal\Downloads\Projects\corcomp>jedutil -view "corcomp_U11_AMPAL16R4A(PC).jed" PAL16R4
Inputs:

2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19

Outputs:

12 (Combinatorial, Output feedback output, Active low)
13 (Combinatorial, Output feedback output, Active low)
14 (Registered, Output feedback registered, Active low)
15 (Registered, Output feedback registered, Active low)
16 (Registered, Output feedback registered, Active low)
17 (Registered, Output feedback registered, Active low)
18 (Combinatorial, Output feedback output, Active low)
19 (Combinatorial, Output feedback output, Active low)

Equations:

/o12 = /rf14 & rf16 & rf17 +
       /rf14 & /rf16 & /rf17
o12.oe = vcc

/o13 = /i2 & /i3 & i4 & /i6
o13.oe = vcc

/rf14 := /i2 & /i3 & i6 +
         i2 & /i3 & i4
rf14.oe = OE

/rf15 :=
rf15.oe = OE

/rf16 := /i5
rf16.oe = OE

/rf17 := /rf16
rf17.oe = OE

/o18 = i4 & i6
o18.oe = vcc

/o19 = i2 & i4 & /i6 +
       i2 & i4 & i6
o19.oe = vcc

U11 ^^

+acadiel · March 27, 2022

Here's your U10 (GAL), @Fritz442:

D:\OneDrive\Personal\Downloads\Projects\corcomp>jedutil -view "Corcomp_MES_(UK002)_Upper_U10_w-FDC_(UB2B)_GAL.JED" GAL16V8
Inputs:

1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19

Outputs:

13 (Combinatorial, Output feedback output, Active low)
14 (Combinatorial, Output feedback output, Active low)
15 (Combinatorial, No output feedback, Active low)
16 (Combinatorial, No output feedback, Active low)
17 (Combinatorial, Output feedback output, Active low)
18 (Combinatorial, Output feedback output, Active low)

Equations:

/o13 = i1 & i2 & /i3 & /i4 & i5 & i6 & /i9
o13.oe = vcc

/o14 =
o14.oe = vcc

/o15 =
o15.oe = vcc

/o16 =
o16.oe = vcc

/o17 =
o17.oe = vcc

/o18 = /i12 +
       /i11 +
       /i8 +
       /i7
o18.oe = vcc

And your U9:

D:\OneDrive\Personal\Downloads\Projects\corcomp>jedutil -view "Corcomp_MES_(UK002)_Upper_U9_w-FDC_(UB1A)_GAL.JED" GAL16V8
Inputs:

1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18

Outputs:

12 (Combinatorial, No output feedback, Active low)
13 (Combinatorial, Output feedback output, Active low)
14 (Combinatorial, Output feedback output, Active low)
15 (Combinatorial, Output feedback output, Active low)
19 (Combinatorial, No output feedback, Active low)

Equations:

/o12 = i2 & i4 & i5 & i6 & i8 & i9 & /i11 & i17 & i18
o12.oe = vcc

/o13 = /i2 & i3 & /i4 & /i6 & /i8 & /i9 & /i11 & i16 & i17 & /i18
o13.oe = vcc

/o14 = i1 & i2 & i4 & /i5 & i6 & /i7 & i8 & i9 & /i11 & i17 & i18 +
       /i1 & i2 & i4 & /i5 & i6 & i7 & i8 & i9 & /i11 & i17 & i18
o14.oe = vcc

/o15 = /i11 & i17 +
       /i2 & /i11 & /i16 & i17 +
       /i1 & /i7 & /i11 & /i16 & i17
o15.oe = vcc

/o19 = i3 & /i16
o19.oe = vcc

+acadiel · March 27, 2022

If I'm reading these properly, here are the differences:

U9:

PLS has pin 19 as an input. The GAL does not.
PLS has "output feedback output" on pins 12 and 19. The GAL does "no output feedback"
PLS has a different /o15 equation than GAL.

PLS:
/o15 = /i11 & o13 & o14 & i16 & i17 +
       /i11 & o14 & /i16 & i17

GAL:
/o15 = /i11 & i17 +
       /i2 & /i11 & /i16 & i17 +
       /i1 & /i7 & /i11 & /i16 & i17

U10:

PLS has outputs on 13 and 18. The GAL has outputs on 14-17.
- Does this matter?
GAL has equations for /o14, /o15, /o16, /o17 = vcc
- Does this matter?
/o18 has a different order of between the PLS and GAL, but this shouldn't matter since it's combinational

Fritz442 · March 27, 2022

Your throwing equations out here from two different types of chips. I have NO idea about these PLS chips.

If you think mine are wrong, then burn them and let me know what fails OR burn your equations and test them.

I have a MES with all 4 GAL's on it (including the one GAL on the lower board) and it has been working for over

a year now with no issues that I have seen.

Edited March 27, 2022 by Fritz442

+Ksarul · March 27, 2022

@Fritz442, that brings us to the answer to one of the questions @acadiel brought up. You have GALs in your MES--does your upper board have the flying wires that show up on the boards with the 153s?

On all other equation questions, you are right, the only way to be absolutely sure is to burn some and test them.

+acadiel · March 27, 2022

Your throwing equations out here from two different types of chips. I have NO idea about these PLS chips. If you think mine are wrong, then burn them and let me know what fails OR burn your equations and test them.
I have a MES with all 4 GAL's on it (including the one GAL on the lower board) and it has been working for over
a year now with no issues that I have seen.

Yes, they’re different. The JED decoder from MAME is what decoded both of them. And yeah, I think what might be different between revs with different chips (maybe I didn’t clearly state it) is the jumper wires/straps underneath.

Then next step, which I didn’t have time for this afternoon, was to pin out the PLDs and say where they went (most go to the 9901). Once we give the pins identifiers and say where they go, we can then see if there are equivalents between them and the PAL/GAL ones in relation to the equations. However, we need someone with the PAL/GAL version of the MES to take a photo of the bottom of their upper board so we can see the wires.

My hope is that this was just a bodge so CC could use different logic chips and that the circuit is essentially the same if you take away that exception.

Fritz442 · March 28, 2022

OK update:

First of all I apologize about my previous statement, my MES had only U2, U10, U11 Gal's installed. Apparently I was working on them and had trouble with U9.

I dismantled both of my MES units, I have two different upper boards... a UK002-A & U002-B versions. You have the B.

The 'A' ver is the one I was duplicating and it had U9_PAL16L8ACN, U10_PAL12L6CN, U11_PAL16R4CN chips.

The 'B' ver has the same as you do, U9 & U10_PLS153N, U11_AMPAL16R4 chips, and all the flying wires are the same.

When I retested my U9 GAL...it did not work correctly. I rewrote it to your U9 findings for output 15 and it worked correctly. U10 & U11 are correct.

I will update the zip file tomorrow. Thank you for that. ;-)

I also swapped all chips around and tested the MES again. All three chips are interchangeable between Ver A & B. The flying wires on the back are different

between the two boards, but all the chips interchange and work. I will post a pic tomorrow of the 'A' board.

atrax27407 · March 28, 2022

A couple of applications that might be of interest to you guys. The first is "vDOS" which creates a DOS environment in Windows 10 and is geared toward old utilities. The second is "PALTOGAL" which converts old PAL JEDEC files to GAL JEDEC files via a menu.

vDosSetup.exe PALtoGALv312.ZIP

Edited March 28, 2022 by atrax27407

Fritz442 · March 28, 2022

Here's the UK002-A board:

Fritz442 · March 28, 2022

Updated the Corcomp zip file in the repository. Please re-download 'Corcomp_PAL-GAL_JEDEC_MAP_FILES_3-27-2022.zip' file and delete old file.

https://atariage.com/forums/topic/312767-palgal-jedec-map-files-for-ti-corcomp-myarc/

+acadiel · March 29, 2022

2 hours ago, Fritz442 said:

Updated the Corcomp zip file in the repository. Please re-download 'Corcomp_PAL-GAL_JEDEC_MAP_FILES_3-27-2022.zip' file and delete old file.

https://atariage.com/forums/topic/312767-palgal-jedec-map-files-for-ti-corcomp-myarc/

Thanks for putting this together! I need to print a large copy of your PCB and mine and compare… curious what they changed.

+Ksarul · March 29, 2022

Looks like the schematics in the CorComp archive are for the UK002 board. Five of the seven flying wires on the board are easily identified, but the last two seem to be missing/not identified.

+dhe · December 16, 2022

On 3/13/2022 at 7:08 PM, acadiel said:

I'm recreating the floppy board for the 9900 Micro Expansion system right now since a lot of folks have the unit without the disk controller.

Hi @acadiel - any news on this project?

+acadiel · December 19, 2022

On 12/16/2022 at 7:34 AM, dhe said:

Hi @acadiel - any news on this project?

I'm about halfway done with it. Life had some interesting turns this year health-wise, including my wife having a benign tumor that had to come out.

I hope to pick up on it again after the holidays.

Artoj · December 23, 2022

Hi All,

I remember when Peter designed his DD board he figured out how to eliminate the PAL/GAL chips with just standard logic gates. Here is his AT system from 1987, it can run 2 x 3.5 inch drives, I will be redrawing it and making it available soon. Hopefully with a GOTEK usb connection as well, still looking at other possibilities. Sorry about the bad photo, I was in a hurry, I will start a new thread concerning Peters designs. The thing I remember at the time was that he analysed both the TI card and the CC card and added his own lot of ingenuity and came out with a winner for all the Aussie TIers. I would be interested in the Input/Output binaries of these types of chips, I like the idea of making the standard logic gates to fit the I/O. Regards Arto

+acadiel · December 23, 2022

3 hours ago, Artoj said:

Hi All,

I remember when Peter designed his DD board he figured out how to eliminate the PAL/GAL chips with just standard logic gates. Here is his AT system from 1987, it can run 2 x 3.5 inch drives, I will be redrawing it and making it available soon. Hopefully with a GOTEK usb connection as well, still looking at other possibilities. Sorry about the bad photo, I was in a hurry, I will start a new thread concerning Peters designs. The thing I remember at the time was that he analysed both the TI card and the CC card and added his own lot of ingenuity and came out with a winner for all the Aussie TIers. I would be interested in the Input/Output binaries of these types of chips, I like the idea of making the standard logic gates to fit the I/O. Regards Arto

I love all the small projects like this that have come to light the past 20 years! We have gotten just so much stuff, it’s amazing. Can’t wait to see this!

RickyDean · September 29, 2023

Anyone know where I can find this interconnect? Maybe a part number? It connects to the pins right by the eprom of the Corcomp MES on the lower unit. I believe mine is bad, it wiggles.

HOME AUTOMATION · September 29, 2023

I have a pile, all from old hard drives.

Corcomp 9900 MES - Disk Controller + 32K Board Recreation

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