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TI Mini Expansion System


Artoj

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4 hours ago, Tursi said:

Yeah, the 'inverted' bank order that the 379 supports is pretty much deprecated now, nobody releases images using it.

 

...excepting me, perhaps. I should probably change to non-inverted programming. With all the changes I am making for fbForth 3.0, it certainly wouldn’t be that difficult.

 

...lee

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2 hours ago, Lee Stewart said:

...excepting me, perhaps. I should probably change to non-inverted programming. With all the changes I am making for fbForth 3.0, it certainly wouldn’t be that difficult.

Yeah, I gave up when people started dropping the tag byte and assuming it would be non-inverted. ;)

 

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On 12/26/2023 at 1:55 PM, Artoj said:

I do enjoy the hands on approach to using computers and do not own a mobile phone,  I know too much about RF to allow it destroy my sensibilities, LOL. 

 

As the Author, my simple synopsis might be enough:

 

A compilation of diverse studies in the underlying designs and principles behind the Arts and Sciences, taken from an Artists perspective on the world he studies. A book where Art, Engineering and the ancient world meet. Highly illustrated, with artwork, numeric tables, geometries, designs and schematics. This is Volume I.

 

https://www.amazon.com.au/Talking-Birds-Compilation-Studies-Artwork/dp/1876406038/

 

I finished writing it in 2013, while I also had two more volumes almost complete by 2016, the madness I had written about actually occurred. I suspended publishing and decided to further my many studies in more detail and outline a new approach to the multitude of broken scientific,artistic and technical issues that have plagued our institutions. I am not alone in all my endeavours and found much commonality with the Retro computing, fringe science, alternate history and traditional artistic communities. We are at the precipice of a new paradigm in the Arts and Sciences and the road is still being mapped, all I can say is I just keep my head clear, work hard and let the law of reciprocity and karma be my guide, while I keep a stern hand on the truth, and allow the current world events to unfold. Regards Arto.          

Do you also write books?

I published my first novel in 2018 (unfortunately only in Italian), it is a novel set in Venice in the 16th century.
Briefly: After the Portuguese discover the routes south to Africa the Venetians and Ottomans agree to dig the Suez Canal.

 

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37 minutes ago, Alessio Iodice said:

Do you also write books?

I published my first novel in 2018 (unfortunately only in Italian), it is a novel set in Venice in the 16th century.
Briefly: After the Portuguese discover the routes south to Africa the Venetians and Ottomans agree to dig the Suez Canal.

 

Nice work Alessio, what's the title? I do have a few draft novels, still not completed as yet. I am also song writer and have one Song book published so far, 3 more Song books in the draft stage, they are only about 20-30 pages, as each song is illustrated and is on a single page. 

It is great to see the breath of talent in these forums, I do have a current project I will be working on with another Artist, it is an Illustrated Novel (Comic Book LOL), set in many time periods and has much to do with a single entity and their journey of enlightenment. As you know there is much work to do in the broad historic research you must complete, it is as much a part of writing a novel as it is writing a text book. Regards Arto.

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2 minutes ago, Artoj said:

Nice work Alessio, what's the title? I do have a few draft novels, still not completed as yet. I am also song writer and have one Song book published so far, 3 more Song books in the draft stage, they are only about 20-30 pages, as each song is illustrated and is on a single page. 

It is great to see the breath of talent in these forums, I do have a current project I will be working on with another Artist, it is an Illustrated Novel (Comic Book LOL), set in many time periods and has much to do with a single entity and their journey of enlightenment. As you know there is much work to in the broad historic research you must do, it is as much a part of writing a novel as it is writing a text book. Regards Arto.

Thank you Arto.

This forum is a true hotbed of artists as well as retromaniac enthusiasts.
I also wrote song lyrics and poems years ago but then I decided to focus on fiction.
I love history so it came naturally to me to write a trilogy set in my hometown right before its decline. The title is: The Knight of Saint Mark (Il Cavaliere di San Marco in Italian).

Is the first of a trilogy (I already wrote all of three books).
If I could show you my library and the books I had to study to write it...
:D

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19 hours ago, Artoj said:

Hi All,

Thanks for all your help, I now have the first prototype ready, regards Arto.

 

TIEPROMCartV3a.png

The "1nF" label for C1 towards the top left has wandered down to by R1 ... if you hadn't noticed. Is the blue layer a solder mask ... that is covering the PCB finger traces?

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On 12/26/2023 at 7:45 PM, Tursi said:

Yeah, the 'inverted' bank order that the 379 supports is pretty much deprecated now, nobody releases images using it.

 

Yep.  
 

(context for newbies, man I’m feeling old now)

Those initial 16K and 64K carts were mainly copying and extending what Databiotics carts did (as the primary >8K carts).  Pitfall being the primary homebrew that used it with TurboForth being the primary utility.
 

But, we later just changed it to non inverted with the 512K and Ubergrom because it made more sense and was less work.  It’s easy peasy to shuffle around the 8K banks and reverse them using a hex editor if someone needs to “invert” it for some reason. All Jim did was just flip the lines around for the LS377/378 and it’s essentially the same write to rom method, just bottom to top instead of top to bottom. 


I still dream of a board with two components:  one being a ROM board with just level shifters on it and a socket, and the other being an 32MB flash IC and a small CPLD that could emulate a LS377+ (what I could call it) that could deal with 12 address lines, the max.  Maybe even an ISP port on either the cart or chip.  We might even be able to put the entire thing on a chip form factor of 42 pins or such with SMT.  (Some folks have made “EPROM emulators” like this with flash chips for rare, hard to find, high capacity EPROMs.  See pic below.)
 

We could make two options for the board - one for just the ROM (all banking on that one chip), and one board could also have an Ubergrom.  The pinout for the chip could even have some sort of standard pinout too.  
 

I figure 32MB using the max address lines ought to keep most folks out of trouble before delving into the bank switching using the data lines (like Dragon’s Lair) to get above that.  Just imagine the mega cart we could build there with 32MB….. 🙂


image.thumb.png.0e83198be082196797a928fb93d00f80.png

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9 hours ago, Stuart said:

The "1nF" label for C1 towards the top left has wandered down to by R1 ... if you hadn't noticed. Is the blue layer a solder mask ... that is covering the PCB finger traces?

Thanks Stuart, I only noticed this after I posted the pic, it's all fixed. :) 

6 hours ago, acadiel said:

We could make two options for the board - one for just the ROM (all banking on that one chip), and one board could also have an Ubergrom.  The pinout for the chip could even have some sort of standard pinout too.  
 

I figure 32MB using the max address lines ought to keep most folks out of trouble before delving into the bank switching using the data lines (like Dragon’s Lair) to get above that.  Just imagine the mega cart we could build there with 32MB….. 🙂

Excellent ideas and it is certainly valuable to simplify, these ideas need to be pursued at some point for all TIers. When I started looking at making a cart, I decided to make sure it can be used by the most basic 8K Eprom, at lot of my work is based on the 2764 Eprom, I have designed an Eprom emulator using just switches. (pic1, pic2)

 

I am laying ground so I can design a Ternary memory system at some point in the future. I am still working on a Rope Core memory for the same project, here are my prototypes (pic3). The final pic is a Ternary Rope core memory design. (pic4) Regards Arto. 

 

dioderompic2a.png

dioderompic3a.png

RopeMemv2PIC1.png

TernaryROMv2pic2a.png

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21 hours ago, acadiel said:

I still dream of a board with two components:  one being a ROM board with just level shifters on it and a socket, and the other being an 32MB flash IC and a small CPLD that could emulate a LS377+ (what I could call it) that could deal with 12 address lines, the max.  Maybe even an ISP port on either the cart or chip.  We might even be able to put the entire thing on a chip form factor of 42 pins or such with SMT.  (Some folks have made “EPROM emulators” like this with flash chips for rare, hard to find, high capacity EPROMs.  See pic below.)

Well, that second one pretty much /is/ what the Dragon's Lair board is, and I released all the gerbers for it (excepting that I have a 128MB flash). (It'll also work just fine as a 32MB flash, just make sure you always write the same value when you page ;) ). The problem with it is getting it programmed... I didn't think far enough ahead when built it - mostly because I was externally programming and then soldering for the first, and in a panic rush for the second. 

 

Since the CPLD is pretty full with all the banking pins and the GROM emulation, I used a second load to program it. The one thing I did right was putting the JTAG pins on the bottom of the board, so you could use pogo pins to quickly update it. In my case, I loaded an alternate load that required a modified console to program it, and used a CF7 for data storage. However, I was pretty sure that JTAG port was the path to fast programming (meaning 20 minutes instead of 90, because the chip erase on that thing still takes 12 minutes.

 

That said, my board does have two layout errors. The write protect pin is tied active underneath the CPLD, that needs to be brought out. And both the CE and Reset need to be tied to the CPLD for reliability, I only have one or the other (depending on the board), IIRC.

 

The flash are mostly pin compatible in that family, so going to a smaller one should work the same footprint and could free up space in the CPLD for other operations, like maybe more than 256 bytes of GROM emulation. Alternately, the next larger CPLD should have lots of space and could probably handle reading and programming in one load.

 

Though the idea of building the whole thing into a DIP package that fits into a normal socket is really appealing... ;)

 

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  • 2 months later...

Hi All, I have been busy refurbishing my very neglected XJ900F and about 100 other things as well (I cracked the Ternary Multiplier puzzle). I found the time to redraw from rough sketches of Mr Bowmans Joystick parallel port and his Whopper 64K cartridge. I hope to build these along with my other designs very soon. Here are all the pics. regards Arto.

    

ParajoyV1-PIC2A.png

ParajoyV1-PIC2B.png

Schematic_TI-JoyParPort-V1_2024-03-12.png

TI-64KRAM-v1PIC2A.png

TI-64KRAM-v1PIC2B.png

Schematic_TI99-Wopper-V1_2024-03-12.png

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Hi All, I have some software listings for the Parajoy, the first one is a typewriter, that uses no assembly. Goodman did a great job designing a usable parallel port from the joystick port, it is slow but does the job. The assembly routine speeds thing up and makes it easy to use. I have added the line from pin 8(joy) to pin11(LPT-busy) to my latest update. Here are my retyped listings, regards Arto.

 

10    REM ***************
11    REM * TYPE WRITER *
12    REM ***************
13    DIM B(8)
20    FOR I=1 TO 8 :: B(I)=128/2^I :: NEXT I
30    REM **** INPUT ************
40    CALL KEY(4,K,S)
41    IF S=0 THEN GOTO 40
42    CALL M(K,B()) :: GOTO 40
49    REM ****JOYSTICK ROUTINE **
50    SUB M(K,B())
51    FOR I=1 TO 7 :: Y=K-B(I)
53    IF Y<0 THE GOTO 60 :: K=Y :: CALL JOYST(2,Y,Y)
60    CALL JOYST(1,Y,Y)
61    NEXY I :: SUBEND 


100    CALL INIT
110    CALL LOAD("DSK1.MSLINK5")
120    OPEN #1:"DSK1.ANYDISPLAYFILE",VARIABLE 80, INPUT
125    REM **** SET UP YOUR TYPE SIZE ETC FOR YOUR OWN PRINTER
126    REM **** BELOW IS SMALL TYPE FOR CGP-115 PRINTER
130    CALL LINK("MSLINK",CHR$(13)&CHR$(18)&CHR$(13)&"S0"&CHR$(17)&"A")
132    REM ***** PRINT YOUR FILE
135    FOR I=1 TO 1000
140    LINPUT #1:A$
150    CALL LINK("MSLINK",A$&CHR$13))
155    NEXT I
160    END 

 

MSLINK IS THE MAIN ROUTINE
VPLINK IS A SCREEN DUMP TO THE PRINTER


        DEF     MSLINK,VPLINK       *DEFINITIONS
VMBR    EQU     >202C               *MULTIPLE BYTE READ
STRREF  EQU     >2014               *STRING PARAMETER RETRIEVE
        EVEN
HF      DATA    >FFFF               *BUFFER #1
HM      BSS     2                   *BUFFER #2
HL      BSS     2                   *BUFFER #3
HK      BSS     2                   *BUFFER #4
BR      BSS     256                 *ARRAY STRING HOLDING CHARACTERS TO PRINT
MSLINK                              *MAIN ROUTINE TO PRINT STRINGS TO 255 CHAR
        LIMI    0                   *DISABLE INTERRUPTS FROM VDP
        MOV     R11,@HK             *SAVE RETURN TO XBASIC
        CLR     R0
        LI      R1,1
        LI      R2,BR               *LINK FIRST ELEMENT TO BUFFER BR
        MOVB    @HF,*R2             *CHECK FOR MAXIMUM LENGTH
        BLWP    @STRREF             *LOAD STRING FROM MSLINK ROUTINE TO BR BUFFER
        MOV     R2,R7               *TRANSFER ADDRESS TO REGISTER 7
        MOVB    *R7+,R8             *MOVE LENGTH OF STRING TO REGISTER 8
        SRL     R8,8                *SHIFT RIGHT 8 POSITIONS FOR PROCESSING
        LI      R9,8                *DUTY CYCLE FOR BIT TIME OF MSG (8 ON 8 OFF)
        LI      R12,36              *PREPARE CRU TO READ JOYSTICK PORTS
        LI      R0,>0050            *INTERSYMBOL DELAY TIME IS 50 CYCLES/RESET
        MOV     R0,@HL              *SAVE DELAY TO BUFFER ML FOR FUTURE USE
        BL      @NL                 *LINK TO PRINT ROUTINE NL
        MOV     @HK,R11             *PRINTING ALL DONE NOW RETURN TO XB
        B       *R11                *RETURN TO XB
NL      EQU     #                   *NL IS THE PRINT SUBROUTINE
        MOV     R11,R10             *SAVE SUBROUTINE LINK IN REGISTER 10
NM      MOVB    *R7+,R1             *FETCH NEXT BYTE FROM BUFFER PUT IN REGISTER 1
        SRL     R1,8                *RIGHT POSITION ASCII BYTE FOR PROCESSING
        CI      R1,124              *COMPARE BYTE WITH "124" ASCII CHAR "1" (224)
        JNE     NF                  *IF IT IS "124" THEN CAUSE A CARRIAGE RETURN
        LI      R1,13               *LOAD REGISTER 1 WITH ASCII 13 FOR CARRIAGE RETURN
NF      EQU     #                   *SUBROUTINE TO DUMP BITS TO JOYSTICK PORTS
        LI      R4,8                *LOAD REGISTER 4 WITH INDEX COUNTER-8 ASCII BITS
NT      EQU     #                   *NEXT BIT TO BE PROCESSED - LOAD CRU W ON/OFF
        SRC     R1,1                *SHIFT THE NEXT BIT INTO LOW ORDER POSITION
        JNC     BQ                  *IF CARRY IS A "0" THEN JUMP TO BQ
        LI      R5,>0700            *CARRY MUST BE "1" SO SELECT CRU 7 (JOY PORT 2)
        BL      @DY                 *BRANCH TO DELAY HOLD JOY, IN PRESENT STATE
BQ      LI      R5,>0600            *BIT MUST BE A "0" SO SEND CLOCK (JOY PORT 1)
        BL      @DY                 *BRANCH TO DELAY HOLD JOY, IN PRESENT STATE
        DEC     R4                  *DECREMENT THE ASCII INDEX COUNTER
        JNE     NT                  *THROUGH WITH 8 BITS? IF NOT BRANCH BACK TO NT
        MOV     @HL,R3              *ALL THROUGH SO LOAD INTERSYMBOL DELAY R3
BZ      DEC     R3                  *DELAY SO HARDWARE IN MODULE CAN RESET                                      

        JNE     BZ                  *NOT EQUAL ZERO SO BRANCH TO BZ 
ZD      TB      -12                 *CHECK THE DOWN LINE - IS THE PRINTER BUSY? ***NOTE 1***
        JNE     ZD                  *MUST BE BUSY - BRANCH ZD
        DEC     R8                  *HAVE ALL CHARACTERS BEEN TRANSMITTED                   
        JNE     NM                  *IF NOT THEN BRANCH TO NEXT LETTER - NM ROUTINE
        B       *R10                *RETURN CONTROL XB - ALL DONE
DY      EQU     #                   *DELAY SUBROUTINE WHICH LOADS CRU JOYSTICKS
        LDCR    R5,3                *LOAD JOYSTICK 2 OR 1 SET THE PIN HIGH
        MOV     R9,R5               *LOAD DELAY COUNTER REGISTER 5 WITH COUNTDOWN
DZ      EQU     #                   *DELAY FOR 8 BITS IN HIGH STATE     
        DEC     R5
        JNE     DZ                  *DONE WITH 8 BITS?
        LI      R5,>0500            *LOAD DELAY COUNTER REGISTER 5 WITH COUNTDOWN
        LDCR    R5,3                *LOAD CRU WITH PHANTOM ADDRESS FORCE PIN LOW
        MOV     R9,R5               *LOAD INDEX COUNTER REGISTER 5 WITH COUNTDOWN
DQ      DEC     R5                  *DELAY IN LOW STATE/SEND A SQUARE WAVE
        JNE     DQ
        B       *R11                *BRANCH BACK TO CALLER ROUTINE
VPLINK                              *PRINTS A PAGE OF VIDEO SCREEN TO PRINTER
        LIMI    0                   *DISABLE INTERRUPTS
        MOV     R11,@HM             *SAVE LINK TO BASIC IN BUFFER NM THIS TIME
        CLR     R0
        MOV     R0,@HK              *SAVE "0" IN BUFFER MK
        LI      R9,8                *INITIATE INDEX CLOCK (ASCII BIT CLOCK) AT 8
        LI      R12,36              *SET CRU LOAD POINT ( REFER ED ASS P408)
        CLR     R6                  *REGISTER 6 IS THE SCREEN LINE COUNTER INITIALLY "0"
        LI      R3,>0050            *LOAD INTERSYMBOL DELAY OF HEX 50 INTO REGISTER 3
        MOV     R9,@HL              *STORE DELAY IN BUFFER HL FOR FUTURE USE
JQ      LI      R5,30               *REGISTER 5 IS SET TO 30 WHICH IS THE MAX NUMBER OF ASCII CHARS/LINE
        LI      R1,BR               *BR IS THE ADDRESS WHERE WE SEND OUR ASCII CHAR
        MOV     R1,R7               *COPY DUMP ADDRESS TO REGISTER 7
        A       R5,R7               *INITIATE ADDRESS AT THE LAST CHARACTER IN LINE
        LI      R2,31               *GET READY TO READ LINE OF CHARACTERS FROM THE SCREEN
        BLWP    @VMBR               *OK GO GET THE CHARACTERS FROM THE SCREEN
        LI      R4,>8000            *HEX 80 IS CHARACTER SPACE WHICH INCLUDE 60 OFFSET
BJ      MOVB    *R7,R0              *MOVE THE CHARACTER(LAST TO FIRST) TO REGISTER 0
        DEC     R7                  *DECREMENT REGISTER 7 IN PREPARATION TO READ NEXT CHAR
        DEC     R5                  *DECREMENT REGISTER 5 WHICH IS THE INDEX COUNTER FOR LINE CHAR
        CB      R0,R4               *COMPARE THE INCIDENT CHARACTER WITH HEX 80
        JEQ     BJ                  *A SPACE CHARACTER? DON'T PRINT TRAILING SPACES.
        AI      R7,2                *ALL DONE REMOVING TRAILING SPACES SO ADD 2 TO R7
        AI      R5,3                *ALSO FIX REGISTER 5 SO THAT THE CORRECT NUMBER/PRINT
        LI      R4,>6D00            *LOAD THE RETURN CARRIAGE CHARACTER INCLUDE OFFSET
        MOV     R4,*R7              *LOAD IT IN THE LAST CHARACTER POSITION IN BUFFER
        MOV     R5,R8               *LOAD NUMBER OF CHAR TO PRINT IN REGISTER 8
        LI      R4,>6000            *LOAD R4 WITH BASIC SCREEN BIAS HEX 60                          
FF      SB      R4,*R7              *GET RID OF THE SCREEN BIAS IN THE CHARACTERS
        DEC     R7                  *DECREMENT R7 WHICH IS INDEX
        DEC     R5                  *DECREMENT R5 WHICH IS ALSO AN INDEX
        JNE     FF                  *ALL DONE REMOVING SCREEN BIAS IF NOT GO TO FF
        MOV     R1,R7               *MOVE ADDRESS OF FIRST CHARACTER IN BUFFER TO R7
        BL      @NL                 *BRANCH TO MSLINK ROUTINE TO PRINT THE LINE
        INC     R6                  *REGISTER 6 IS LINE COUNTER ADD 1 TO IT FOR NEXT LINE
        CI      R6,22               *HAVE 22 LINE BEEN PRINTED? IF SO THEN BYPASS
        JEQ     JV                  *THE ROUTINE THAT SETS UP THE NEXT LINE
        MOV     R6,R0               *SAVE REGISTER 6 IN REGISTER 0 FOR PROCESSING THE NEXT LINE
        SLA     R0,5                *MULTIPLY OFFSET BY 32 TO GET TO THE NEXT LINE
        JMP     JQ                  *JUMP TO THE JQ ROUTINE TO PROCESS THE NEXT LINE
JV      MOV     @HM,R11             *RECALL RETURN TO XBASIC CALLER
        B       *R11                *RETURN CONTROL TO XB
        END

* THE SEQUENCE IS AS FOLLOWS:
* 1)    LOAD THE 30 BASIC CHARACTERS THE SCREEN (VDP) TO THE 255 CHARACTER BUFFER BR
* 2)    GET RID OF THE TRAILING BLANKS ON THE LINE, THEY WASTE PRINTING TIME
* 3)    GET RID OF THE HEX 60 SCREEN OFFSET
* 4)    POSITION A CARRIAGE RETURN SYMBOL AT THE END OF THE LINE
* 5}    USE THE MSLINK ROUTINE TO PRINT OUT THE LINE
* 6)    REPEAT THE PROCESS UNTIL ALL 22 LINES HAVE BEEN PRINTED
* COPYRIGHT 1983 BY G.A. BOWMAN, VERNON HILLS, ILLINOIS
                        
* NOTE 1 **** CONNECTION NOT SHOWN ON ORIGINAL INTERFACE        


 DATA|
.----|-----------.
| 1  2  3  4  5 |       
 \  6  7  8  9 /
  \____|__|___/
       |  |       
  CLOCK|  |DOWN (TB-12)     
          |     
           '----------------------PIN 11 (BUSY) ON DB25 - IT HAS BEEN ADDED BUT NOT TESTED

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Posted (edited)

Hi All, here is my latest update on the SAMS MiniPEB Memory card, I found a few errors and missing connections. This is Version 3.0, the next update should be the final, Regards Arto.

 

TI99MINIPEB-SAMS-V3pic2a.png

TI99MiniPEB-SAMS256-1024v3pic1a.png

Edited by Artoj
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42 minutes ago, Tornadoboy said:

Are the gerbers and parts placement diagrams available for download somewhere for any of these boards?

When all the boards are tested and built (final version), all the relevant files will be made public. At present I have only partially built about 4 boards and found errors on a few others. If I feel confident about the work, I will make that available ASAP. I am itching to get back to the soldering iron to finish my work, as my workshop is not completed, I have been looking at making a catalogue of all the TI99 work and my Ternary work available soon. If you want a particular board that I have been working on, just let me know, I use EasyEDA software and will post it here (Atariage) so everyone can have a go at it. Regards Arto. 

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