(Regular) Pokey in FPGA?

[+mytek]

5 minutes ago, foft said:

Thanks. Wow that NUC is tight! Well not sure I can promise to fit there but there are some improvements in v4:

I didn't expect miracles.

 

BTW, on that first first pic I posted. Instead of a female header for J8, it should have stated male pin header instead.

[ScreamingAtTheRadio]

13 minutes ago, foft said:

Not sure yet if I can route it, the last 20% is the hardest!

No joke, especially on such as small footprint.

13 minutes ago, foft said:

As for those resistor arrays, I didn’t find them hard to get at all last time. Any one in particular?

Seems like I wasn't looking at the footprint right. I did find them under 0603x4:

Stocks are pretty low I suppose and if by any chance it helps with routing... Probably a little more annoying if assembling by hand, but I have no intention to

I'm still going through the BOM, I'll yell if I have trouble finding something else.

[ScreamingAtTheRadio]

So the 50MHz oscillator is giving me trouble. I can find parts that are pretty close on Digikey, but they don't seem to even be on JLC's catalog.

 

LM339 is easy to find, but not in this package. Those two might benefit a footprint swap...

 

Not sure what to look for for FB1. Looks like some sort of regulator but I didn't find anything with a 0402 footprint that looked like that.

 

Apart from those, some components might need a reorder delay but seems findable at JLC.

[foft]

The clock is only needed to do accurate spdif timing (I need to change the core though if you drop it). I used 49.152MHz on the final boards.

 

The LM339 I’m dropping on my newer design, the fpga has lvds inputs and I used them as comparators ok on the sidmax.

 

FB1 is a ferrite beed which Altera propose to go from 3.3V digital to  3.3v analog supply. Think they suggest some on their guidelines iirc, or perhaps it was while frequency specs.

[foft]

Layout finished, going to order this chap soon.

 

Any suggestions to improve appreciated.

http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/atari_chips/hardware/pokeymaxv4/

 

Extra IO/features could be removed to cut size a bit if someone fancies some eagle and/or kicad fun:

i) Remove extra audio channels.

ii) Remove extra io and headers

iii) Remove adc in supporting parts

iv) Remove the oscillator

 

Perhaps without those the footprint would shrink and it'd fit in NUC? I think it might need a little more, e.g. use a smaller FPGA chip so that the traces can all be routed inside. Alternatively give up on two layer and pay for four layer boards.

 

[+scorpio_ny]

1 hour ago, foft said:

Layout finished, going to order this chap soon.

 

Any suggestions to improve appreciated.

http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/atari_chips/hardware/pokeymaxv4/

 

Extra IO/features could be removed to cut size a bit if someone fancies some eagle and/or kicad fun:

i) Remove extra audio channels.

ii) Remove extra io and headers

iii) Remove adc in supporting parts

iv) Remove the oscillator

 

Perhaps without those the footprint would shrink and it'd fit in NUC? I think it might need a little more, e.g. use a smaller FPGA chip so that the traces can all be routed inside. Alternatively give up on two layer and pay for four layer boards.

 

Hi @foft,

Thank you for this new version! What are the differences between V4 & V3?

[foft]

BOM - 37USD + tax (So 42USD here, but varies of course), using the 10M08 (full features - sid, psg, sample, except no quad pokey, just stereo):

https://www.digikey.ch/en/mylists/list/5OXIK761HK

10M16 (recommended) is 20CHF more expensive, will fix quad pokey + space for more (AMY 🤣)

10M02 for basic pokey no flash is 5CHF cheaper, will fit just stereo pokey

 

Changes v4 vs v3:

i) 2 layer, single sided pcb instead of 4 layer, double sided.

ii) Uses the FPGA LVDS inputs instead for paddles instead of LM339

iii) Keyboard has a direct connection to the FPGA, instead of an IO expander

iv) Digital ADC instead of analog mixing

v) Pin headers moved from outside to make it a bit thinner - 4x block with L/R/SPDIF and GND, 8x block with IO (A4-A7, GTIA, PS2, ADC IN)

 

Note that for all versions of pokeymax they use 0.2mm vias, 6 mil traces and a BGA. So not suitable for ultra-cheap PCB house standard 2 layer boards.

Edited April 8 by foft

[+mytek]

1 hour ago, foft said:

Perhaps without those the footprint would shrink and it'd fit in NUC? I think it might need a little more, e.g. use a smaller FPGA chip so that the traces can all be routed inside. Alternatively give up on two layer and pay for four layer boards.

It's gonna be tight, but maybe shave off the side of the nylon standoff (on the NUC) and possibly use right angle headers on PokeyMax.

 

 

I had forgotten that the nested 64K SRAM was under the CPU and not Pokey. So no additional socket height is required for Pokey or PokeyMax. This means that the clearance from the top of the socket to the underneath side of the daughter board for the 576NUC+ is closer to 12 mm.

 

EDIT: There are some nested radial caps that stick up, but those could be bent over or replaced with axial parts if there is a clearance issue.

[+scorpio_ny]

2 hours ago, foft said:

BOM - 37USD + tax (So 42USD here, but varies of course), using the 10M08 (full features - sid, psg, sample, except no quad pokey, just stereo):

https://www.digikey.ch/en/mylists/list/5OXIK761HK

10M16 (recommended) is 20CHF more expensive, will fix quad pokey + space for more (AMY 🤣)

10M02 for basic pokey no flash is 5CHF cheaper, will fit just stereo pokey

 

Changes v4 vs v3:

i) 2 layer, single sided pcb instead of 4 layer, double sided.

ii) Uses the FPGA LVDS inputs instead for paddles instead of LM339

iii) Keyboard has a direct connection to the FPGA, instead of an IO expander

iv) Digital ADC instead of analog mixing

v) Pin headers moved from outside to make it a bit thinner - 4x block with L/R/SPDIF and GND, 8x block with IO (A4-A7, GTIA, PS2, ADC IN)

 

Note that for all versions of pokeymax they use 0.2mm vias, 6 mil traces and a BGA. So not suitable for ultra-cheap PCB house standard 2 layer boards.

Wow fantastic! Another question ( I think I know the answer, but wanted to ask anyway): are any of the V4 cores downward compatible with either V3 or V2 hardware?

Edited April 8 by scorpio_ny

[woj]

7 hours ago, foft said:

So not suitable for ultra-cheap PCB house standard 2 layer boards

I think I only know how to order this kind, what options do I need to click to get the right thing?

[ScreamingAtTheRadio]

24 minutes ago, woj said:

I think I only know how to order this kind, what options do I need to click to get the right thing?

You typically need a zip with the gerbers, a position file and a bom that follow a format that can vary between fab houses. I’ll build those tomorrow for a JLCPCB order, and I’ll share a link to the files here.

[woj]

54 minutes ago, ScreamingAtTheRadio said:

You typically need a zip with the gerbers, a position file and a bom that follow a format that can vary between fab houses. I’ll build those tomorrow for a JLCPCB order, and I’ll share a link to the files here.

 

OK, this part I sort of know, though I never ordered pre-assembled boards (I honestly thought of doing it myself on my reflow plate, just for the exercise, but I do foresee this is not going to be easy), and ready made assembly files are going to be indeed extremely useful. What I meant is that particular options for the board "quality" and material have to be chosen due to high detail level, this is something I am a bit blank about.

 

Another thing @foft, this is as far as the board goes, I assume that the V4 FW files will come up at some point too, or is one supposed to use V3 ones? Also, I am not yet clear about bootstrapping the FPGA chip with the core, but I have not yet read all the V3 docs. I did find an Atari based program though for flashing PokeyMax, this one: https://github.com/MADRAFi/PMAX_Update, I wonder if this will work here? (But will require some bootstrapping nevertheless?). 

[foft]

You need a jtag to flash the fpga. The reflashing support for the xex program is actually in the core. See http://www.64kib.com/pokeymax_files/pokeymax_jtag_adaptor/ for the usb blaster pinout.

 

The v4 needs vhdl changes and has different pin assignments. Nothing major though, it’ll only take a few hours.

 

I wouldn’t order yet, now we can iterate improvements a bit. eg

i) Should I change it to 4 layer, could then made it a bit thinner? Might not be much more pricey given I’m already using 0.2mm vias.

ii) Can we cut the bom price via… some cleverness?

iii) Did I make any mistakes etc:)

iv) Is there a cheap 3-4 channel dac I can use instead of the op amp output stage?

v) Could we use a cheaper Efinix fpga?

vi) Any way I could fit the full 10 pin jtag, perhaps a hd socket?

vii) Is there a way to do 5v tolerance cheaper than these level shifter chips?

To assemble these manually you need hot air or another reflow device. Also I’d strong recommend very fine tweezers and magnification. I use a usb microscope.

Edited April 9 by foft

[woj]

8 minutes ago, foft said:

You need a jtag to flash the fpga. The reflashing support for the xex program is actually in the core. See http://www.64kib.com/pokeymax_files/pokeymax_jtag_adaptor/ for the usb blaster pinout.

 

I see, thanks! (Me running only WINE and virtualized Windows 7 will probably complicate things for me here, but will see...)

 

9 minutes ago, foft said:

To assemble these manually you need hot air or another reflow device. Also I’d strong recommend very fine tweezers and magnification. I use a usb microscope.

 

All that I have access to, even a proper grade reflow oven if needed at the uni lab, a hot plate and hot air gun at home. As said, I want to make an exercise out of this for myself, rather than doing proper production.

 

10 minutes ago, foft said:

I wouldn’t order yet, now we can iterate improvements a bit.

 

I will not go first for sure  

[foft]

3 minutes ago, woj said:

I see, thanks! (Me running only WINE and virtualized Windows 7 will probably complicate things for me here, but will see...)

There is a Linux version of Quartus, does that help? Or are you on Mac OS X?

Without Quartus you can flash using openocd.

[foft]

3 hours ago, ScreamingAtTheRadio said:

You typically need a zip with the gerbers, a position file and a bom that follow a format that can vary between fab houses. I’ll build those tomorrow for a JLCPCB order, and I’ll share a link to the files here.

Are you going to do it as a panel? I got this when I tried to click the assemble button:

"PCB assembly requires a minimum size of 10x10mm,"

(Oops, I forgot to put the size in - pcbway auto-detects it - I was thinking cm!)

 

Also I checked with jlcpcb, they cannot do the 0.2mm drills with 2 layer. They suggested I make it 4 layer. I can prepare that, but suggest we try to get a quote from pcbway. They can do the 0.2mm on 2 layer and assemble small boards. I know because they did it before.

 

Edit: Added a 4 layer version to the svn. Still routed as 2layer, but with a polygon fill of gnd and 3.3v on layer 15 and layer 16. Should be better for noise and should work with jlcpcb limits.

Edited April 9 by foft

[foft]

Tried to fit it into jlcpcb 2 layer design rules:

http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/atari_chips/hardware/pokeymaxv4/2layer030drill/

I used these design rules, though I had to shrink the annular rings from 40% to 30%. I think that is within the rules, but not double checked yet.

https://github.com/oxullo/jlcpcb-eagle/blob/master/design rules/jlcpcb-2layers.dru

[ScreamingAtTheRadio]

I can prepare quotes for JLC and PCBWay sometime today and let folks know here unless someone gets to it first. PCBWay tends to be MUCH more expensive than JLC though, so I suspect even 2-layers at PCBWay is likely to be more expensive than 4 at JLC, but we'll see.

 

I had another question: what are the exact requirements for the FPGA?

[foft]

42 minutes ago, ScreamingAtTheRadio said:

I can prepare quotes for JLC and PCBWay sometime today and let folks know here unless someone gets to it first. PCBWay tends to be MUCH more expensive than JLC though, so I suspect even 2-layers at PCBWay is likely to be more expensive than 4 at JLC, but we'll see.

 

I had another question: what are the exact requirements for the FPGA?

Well I ordered 10 of the two layer 0.3mm drills from pcbway. With the smaller drills the price was only 5USD/10 from pcbway.

 

Anyway I'll try them out and see if they work.

 

FPGA: MAX10 U169 11x11 BGA version SC. 

02=Stereo pokey, no flash support

04=Stereo pokey + covox, flash support

08=Stereo pokey, stereo psg, stereo sid, covox/paula

16=Quad pokey, stereo pig, stereo sid, covox/paula and space for more.

 

Or did you mean if we wanted to use a different FPGA device what resources does it need?

[ScreamingAtTheRadio]

9 minutes ago, foft said:

Or did you mean if we wanted to use a different FPGA device what resources does it need?

Yes, exactly, I was wondering how low-spec we could go, including much cheaper CPLDs (MAXV and the such).

[foft]

Well, depends on what is put into it.

 

Max10 includes these features we use:

i) Logic elements

ii) Is single supply

iii) Block ram

iv) Flash rom (for user settings and for storing the core itself)

v) DSP blocks

vi) Internal oscillator (imprecise)

vii) PLL used to generate higher frequencies for sigma delta dac

viii) LVDS comparators

 

Mono pokey usage, no settings is:

Total logic elements : 1,555 / 2,304 ( 67 % )
    Total combinational functions : 1,312 / 2,304 ( 57 % )
    Dedicated logic registers : 974 / 2,304 ( 42 % )
Total registers : 979
Total pins : 45 / 130 ( 35 % )
Total PLLs : 1 / 1 ( 100 % )

 

Stereo pokey, no settings:

Total logic elements : 2,033 / 2,304 ( 88 % )
    Total combinational functions : 1,666 / 2,304 ( 72 % )
    Dedicated logic registers : 1,323 / 2,304 ( 57 % )
Total registers : 1328
Total pins : 45 / 130 ( 35 % )
Total PLLs : 1 / 1 ( 100 % )
 

Stereo pokey, covox, flash storage:

Total logic elements : 2,824 / 4,032 ( 70 % )
    Total combinational functions : 2,358 / 4,032 ( 58 % )
    Dedicated logic registers : 1,806 / 4,032 ( 45 % )
Total registers : 1811
Total pins : 45 / 130 ( 35 % )
Total PLLs : 1 / 1 ( 100 % )
UFM blocks : 1 / 1 ( 100 % )
 

Stereo pokey, stereo psg, stereo sid, covox/paula (on 10M08)

Total logic elements : 7,926 / 8,064 ( 98 % )
    Total combinational functions : 7,615 / 8,064 ( 94 % )
    Dedicated logic registers : 4,904 / 8,064 ( 61 % )
Total registers : 4911
Total pins : 45 / 130 ( 35 % )
Total memory bits : 344,064 / 387,072 ( 89 % )
Embedded Multiplier 9-bit elements : 48 / 48 ( 100 % )
Total PLLs : 1 / 1 ( 100 % )
UFM blocks : 1 / 1 ( 100 % )
 

Quad pokey, stereo psg, stereo sid, covox/paula (on 10M16)

Total logic elements : 10,165 / 15,840 ( 64 % )
    Total combinational functions : 8,844 / 15,840 ( 56 % )
    Dedicated logic registers : 5,721 / 15,840 ( 36 % )
Total registers : 5721
Total pins : 53 / 130 ( 41 % )
Total memory bits : 344,280 / 562,176 ( 61 % )
Embedded Multiplier 9-bit elements : 53 / 90 ( 59 % )
Total PLLs : 1 / 1 ( 100 % )
UFM blocks : 1 / 1 ( 100 % )
 

 

UFM=flash. I use flash for read-only data too, including unused core storage space.

Internal memory=largely used for covox/paula data

DSP blocks=used for sid filter maths and a few other places where multiplication helps (not used in base pokey)

 

 

 

resources.xlsx

Edited April 9 by foft
Added spreadsheet with breakdown

[Panther]

It would be nice to have inexpensive POKEY replacements that just support stereo with no extras (just the ability to toggle between mono and stereo), which I suppose would be handled by the 10M02.  I see the 10M02SCM153C8G for $6.46 USD in 25 quantity, and at 8x8 mm (M153), it's more compact than the U169 package.

 

[ScreamingAtTheRadio]

@Panther where did you get those prices? I just checked the prices on Digikey and the JLCPCB parts library and they are not good. Might have to send them the parts before assembly, or assemble by hand...

 

A stereo Pokey might be achievable on a 5M2210: 2210 LEs, 271 pins, 1kB flash, 1 osc and 4 global clocks?

Edited April 9 by ScreamingAtTheRadio

[foft]

What the the benefits of the 5M2210? I see min size 17x17mm and also 26USD (edit: 6USD on aliexpress), but perhaps I'm missing something? Is it 5v tolerant so the level shifters can be removed?

 

Yes the 10M02SCM153C8G will work. Its 0.5mm pitch rather than 0.8mm pitch, so a little harder to place I guess. I'm not sure if cheap PCB houses will do via in pad which I guess this needs?

Edited April 9 by foft

[ScreamingAtTheRadio]

Yeah, nevermind. MaxV should in principle be cheaper but turns out 10M02SCM153C8G is way cheaper, at least at Digikey. Weird. JLC stocks them at >$43 which is insane.

 

JLC supports via in pad.