Pokeymax v4 bring up thread

[foft]

I'm going to receive the pokeymax v4 boards tomorrow and, all being well, get them running over the next week or so.

 

Since the project is now more open than before I'm going to post some details of what needs doing for this here along with progress. Feel free to chime in with comments.

 

Status:

i) Boards ordered from PCBWay. http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/atari_chips/hardware/pokeymaxv4/2layer030drill/

ii) Parts ordered from Digikey - arrived. https://www.digikey.ch/en/mylists/list/MZC8NOSXG1. I grabbed 5 copies (it's cheaper in volume) and removed four of the FPGAs. I'm planning to transfer and reball some of the FPGAs from my other boards. Also I already have a spare new 10M08 floating around.

 

TODO:

a) svn checkout the HDL from http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/

b) Modify atari_chips/pokeyv2/ to add the v4 board:

1. Copy the qsf file and correct/add the pin assignments from the schematic.
2. Set up the paddle pins as LVDS.
3. Add a feature to pokeymax.vhd to directly use the fpga io for the keyboard instead of using the io expander chip over i2c.
4. Add a feature to pokeymax.vhd to directly reset the paddle pins
5. Copy the ADC input feature from the sidmax.vhd to pokeymax.vhd, add it to the pokey mixer.
6. Update build.sh adding a v4 board and enabling these features
7. Synthesise the logic by sourcing the quartus settings file then running build.sh with the new configuration.

c) Assemble a board bit by bit checking functionality

1. Visual inspection
2. Check for shorts on the power nets
3. Solder on the regulator, its support parts (caps, inductors) and ferrite bead for 3.3v analog.
4. Power the board and check power rail voltages.
5. Solder on the FPGA, FPGA core support parts (Pull ups etc), FPGA jtag support parts.
6. Connect the JTAG, can I see the FPGA?
7. Modify my JTAG boundary scan script to check for any shorts under the FPGA.
8. Solder on the rest of the SMD parts: 5V/3.3v level converter chips, paddle level potential divider, adc coupling cap and dc bias, output op amp and feedback parts, output audio coupling caps
9. Solder on the pin header strips, the audio output header and the io header.
10. Put it into the Atari! 
11. Power it on, flash the new core, power off/on and pray!
12. Debug, goto 11.

Edited April 14 by foft

[foft]

Found the first mistake, I put this 8-pin header on the BOM when I needed a 10 pin. Doh!

https://www.digikey.ch/en/products/detail/adam-tech/PH2RA-08-UA/9830984

[+mytek]

56 minutes ago, foft said:

Found the first mistake, I put this 8-pin header on the BOM when I needed a 10 pin. Doh!

https://www.digikey.ch/en/products/detail/adam-tech/PH2RA-08-UA/9830984

It happens to me all the time. Even if I double and triple check a BOM, it never fails that at least one thing is wrong when I go to assemble a board. Nothing like ordering and assembling from the early draft to really verify accuracy 🙄

[Panther]

3 hours ago, mytek said:

It happens to me all the time. Even if I double and triple check a BOM, it never fails that at least one thing is wrong when I go to assemble a board. Nothing like ordering and assembling from the early draft to really verify accuracy 🙄

I couldn't even manage to get the first version correct of a circuit board only a few millimetres wide (connector placement was backwards)!  As someone told me, always think about what's next.

 

[olix]

Nice to hear that the PokeyMax success story continues. But what is the goal to be achieved with version 4?

 

Cheaper than PokeyMax V3?
More and new functions than V3?
Better availability than V2 and V3?

[woj]

3 hours ago, olix said:

Nice to hear that the PokeyMax success story continues. But what is the goal to be achieved with version 4?

 

Cheaper than PokeyMax V3?
More and new functions than V3?
Better availability than V2 and V3?

 

Here, towards the end of the thread: 

 

 

[foft]

I received the boards:

So, started making it. The 3.3v regulator is a bit small. A bit of flux, tinned the pads, held in place with tweezers and a bit of hot air:

This is enough to get 3.3v working. Regulator, two caps and and an inductor. 

Couple of wires to test it and it worked:

 

Then put on the 2.5v regulator and a decoupling cap because it was next to it:

Oh and I also got some jtag adaptors:

Also getting there with the pin assignments file, not quite ready to commit yet though. 

[foft]

The MAX10 and the level shifters run on 3.3v, that is why I need that. One nice feature of this version of the MAX10 is that it is single supply, so I only need to provide 3.3v. Unlike the Cyclone V in the EclaireXL for example which needs 3.3v, 2.5v and 1.1v.

 

I added an extra 2.5v on here though so I can run the LVDS inputs as comparators for the paddle inputs. Also I use an LVDS input as an ADC for audio input. I think I tested it and it does actually work with 3.3v, but Intel said in a thread on their forum that might damage it so thought I'd better include a regulator. 

 

Anyway power is working, onto the next step.

[foft]

Before work this morning I finished the supporting parts for the FPGA:

• All decoupling caps: C1,C2,C5,C6,C11 - all 0.1uF
• Ferrite bead for 3.3v analog from 3.3v
• JTAG and pull ups to get the FPGA to configure. R3 is 1K, R1,R2,R4,R5 are 10K.

Next its the FPGA, 169 pins of BGA goodness!

[foft]

Put this little chap on (tinned pads on the pcb with lead free + flux, cleaned up, then simply placed this on and heated it up with hot air):

Here we are:

Then connected 5V and the usb blaster and ran jtagconfig and ... its on jtag at least:

jtagconfig
1) USB-Blaster [1-5.1]
  031820DD   10M08SA(.|ES)/10M08SC

 

It lives, to some degree at least!

 

Edited April 16 by foft

[+mytek]

@foft that BGA chip scares me

 

How do you know when all the points are soldered? Be next to impossible to do a visual inspection.

[foft]

1 hour ago, mytek said:

@foft that BGA chip scares me

 

How do you know when all the points are soldered? Be next to impossible to do a visual inspection.

xray machine, or in my case ... pray!

 

I'll be back with more updates next week, no time to work on this after tonight for a few days.

 

I ran into a fun problem though with the paddle inputs. I used LVDS inputs for the comparator and thought I could also set them to outputs to reset the paddle. Though... no luck so far. Seems like it should be possible though according to this: http://www.altera.com/literature/an/an522.pdf

 

[ScreamingAtTheRadio]

Fantastic to see progress... In the meantime, I imported @foft's design into KiCad and put it in a git repo: https://github.com/bleroy/pokeymax. (discussion in the other thread) I'll try to keep the repo in sync with recent progress. My own personal goal in this is to reach the point where, component availability permitting, it is possible to order assembled PokeyMaxes from the likes of JLCPCB (I added a BOM with JLC part numbers in the production folder already). Because I want Pokeys and I'm afraid of BGA Thanks again @foft for making this possible.

[foft]

I committed a first pass of the hdl support to the repository, untested as yet. It synthesizes, that is all that can be said!

• Added pokeymaxv4.qsf with pin definitions based on the schematic
• Added pokeymaxv4.sdc, just a copy of v3. Will need updating.
• Added the 3 features to the pokeymax.vhd as generics: iox vs direct keyboard k/kr support, paddle via external/internal comparators, adc (not yet wired to mixer)

Also just got a new disk for my server, so hopefully it'll stop going down all the time!

[foft]

Found a few more minutes!

 

Popped the level shifters on, not all plain sailing with these small items:

A bit of flux and braid and its all good:

Careful, these go on two different ways around

Couldn't resist popping pins on and putting it in the Atari. No sound circuits yet or paddle supporting parts etc.

Result: Atari still boots to basic, keyboard not working, sio not working - see some speed switches only on aspeqt.

Not too surprised for the first test, but pleased it boots at least!

Edited April 17 by foft

[Peri Noid]

3 hours ago, foft said:

Result: Atari still boots to basic

Good first step. It's the opposite with faulty Pokeys.

[woj]

I am watching eagerly, quietly and patiently, in the meantime making sure that I have Quartus working, checking where to order the USB-blaster, and I did not want to interject, but I do have to ask: is the external pin assignment for audioa/A4/U1MB/GTIA Bell already known? I can see place for 2x2 and 2x5 headers, and it seems to me that to integrate this nicely into my machine(s) that now have my own stereo board I will need to prep a connecting board for the audio filtering capacitors (those will still be in the picture, correct) and my signals connector, so I was thinking I can get on that while you keep making the prototype work. But for that I need to have an idea where each pin will be?

[foft]

The audio ac coupling caps are already included (since v2b).

 

Regarding pins, on the top header there are four pins:

GND SPDIF

LEFT RIGHT

 

On the bottom header the pins are:

2 4 6 8 10

1 3 5 7 9

I was planning this:
9= SIO audio in

1=A4

2=A5

3=A6

4=A7

5=PS2clk

6=PS2dat

7=GTIA audio

 

1-8 and 10 can be redefined here:

http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/atari_chips/pokeyv2/build.sh

See:10M08_fullv4_stereo

 

Re U1MB: It has a plugin now and talks to pokeymax directly, no need for a wire.

Edited April 17 by foft

[woj]

40 minutes ago, foft said:

1-8 and 10 can be redefined here:

http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/atari_chips/pokeyv2/build.sh

See:10M08_fullv4_stereo

Super! I can see that I can probably configure the A4/Bell/U1MB pins to match my connector, and since the caps are on board, no extra PCBs will be required.

 

I have one more problem, with your site in fact, this server of yours should be a proper SVN repo server, no? (Excuse my rustiness, last time I actively used SVN was some 8 years ago), I tried to checkout from it with:

 

svn co svn://www.64kib.com/atarixlfpga_svn

 

This just time-outs, after a considerable wait. HTTP version did not work either, with an immediate message that HTTP/DAV is not supported. Or is the SVN specific read access not public, and I need credentials (which I won't get I know ;))?

 

EDIT: Oh, and about U1MB - yes, I know there is a plugin, but I have my own custom plugin set to control a video device I cooked up, and I am not sure I will have space in the 2K plugin space to pull in the PokeyMax one..

Edited April 17 by woj

[foft]

Should just be able to:

svn checkout http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/

[woj]

21 minutes ago, foft said:

Should just be able to:

svn checkout http://www.64kib.com/atarixlfpga_svn/trunk/atari_800xl/

Thank you, that worked, the only combination I did not try, of course 😕  

[Mathy]

Hello @foft

 

Could you explain in laymen's terms what the PokeyMax V4 will bring us?  Stereo Pokey plus .... 

 

Sincerely

 

Mathy

 

Edited April 17 by Mathy

[foft]

Well the pokeymax project, as entered to abbuc, was intended to provide a low cost simple pokey replacement that supports all features in close to the original chip footprint.

 

Nowadays there is more spare IO exposed from the FPGA allowing various modules to be enabled at core synthesis time, mostly mapped in a standard software discoverable way.

The modules available are:

i) Pokey!

ii) SID including decent filter for 6581 and 8580 as used in the C64.

iii) YM2149 (PSG) as used in the ST

iv) Covox

v) Covox extension that can play samples from internal fpga ram, compressed using adpcm. Like Paula on the Amiga but uses its own memory due to system memory constraints.

vi) PS2 keyboard support with fixed Atari key positional mapping (like the EclaireXL)

vii) SPDIF output

viii) Analog output

ix) Flash support (needed for data for some of the above, otherwise used to store settings)

There all take space, so you can decide what to enable based on the size of the FPGA you fit.

The 'full' setup I used on the largest 10M16 (recommended) ones is quad pokey, dual sid, dual psg, covox with sample, spdif, analog, ps2

 

As to what v1-v4 bring, I'll post a small table shortly.

 

 

 

[foft]

Version

Sub-version

Analog audio outputs

Audio output method

Audio output coupling caps

Digital audio output (spdif)

Keyboard method

Paddle method

Audio input

Spare IO

Board

Changes

Issues

1

Compo

4

Sigma delta + rc (3.3v)

FALSE

FALSE

io expander

lm339 comparator

1

2 side, 2 layer, regulator sticks out, pin header on right

Very quiet, paddles incorrect, keyboard issue with tkii

1

Final

4

Sigma delta + rc (3.3v)

FALSE

FALSE

io expander

lm339 comparator

1

2 side, 2 layer, regulator sticks out, pin header on right

Make louder (rc values), fixed paddles(remove parts)

Still fairly quiet, not enough io, keyboard issue with tkii

2

4

Sigma delta + rc (5v via buffer)

FALSE

FALSE

io expander

lm339 comparator

3

2 side, 2 layer, close to pokey size, pin header on right

Added io, buffer chip for output, smaller

Could still use more spare io, keyboard issue with tkii

2

b

4

Sigma delta + rc (5v via buffer)

TRUE

FALSE

io expander

lm339 comparator

3

2 side, 2 layer, close to pokey size, pin header on right

Added ac coupling caps

Could still use more spare io, keyboard issue with tkii

3

4

Sigma delta + rc + op-amp scaled

TRUE

TRUE

io expander

lm339 comparator

Analog mixing via op-amp

11

2 side, 4 layer, close to pokey size, pin header on right. Parts on both sides!

Op-amp audio output, analog mixing, lots of io

Expensive to produce, keyboard issue with tkii

4

3

Sigma delta + rc + op-amp scaled

TRUE

TRUE

FPGA direct

FPGA LVDS build-in comparators

Digital mixing

10

2 side, 2 layer, close to pokey size, inland headers

Remove io expander, small smaller and cheaper

pokeymax_features matrix.xlsx

Edited April 18 by foft
Table cannot scroll? Attached file instead.

[woj]

So below my mileage when it comes to trying to synthesize the PokeyMax cores from the repository. I am fully aware of the fact that this is all work in progress, that the repo might be in a transitional state, and that so far the whole project was used mostly by the developer only.

 

I installed Quartus Lite version 23.1std (basic package, Max 10 device support, and also the standalone programmer to be safe, but this last one seems to be included in the basic install, probably was not necessary). The OS is Ubuntu 64bit, and I I think I did set all the Quartus paths correctly and sufficiently (but not 100% sure), at least none of the Quartus tools seem to fail to execute. Warning to others - this thing, even in this cut-down Lite version, is huuuuuge!

 

Working just on the PokeyMax in the directory that you indicated (atari_chips/pokeyv2), SVN revision 1397.

 

First, it seems the build script does not take care to (g)cc some of the helper programs, so I built them by hand (init.c, sidwavedata.c, swapbits.c, could not compile sidcfg.c due to missing conio.h, did not investigate further) after first unsuccessful attempts to build the v4 core. I am not sure which of these are needed, but I can only presume that you built them by hand once in your working directory and things work for you since then.

 

I can build the v3 cores (I tried 10M04_quad_auto_v3, 10M16_fullv3, and the last one pulled in 10M16_fullv3_xel too it seems), they did build and I got the files I think should be there (most notably core.bin, pokeymax.pof). But to be honest, the build script messages give little confidence in that it all went the way it was supposed to. There is a lot of messages about missing files, in particular towards the end it says that UFM0.bin and UFM1.bin are missing, really not sure if they should be there or not.

 

For a test I also tried v1_10M02_stereo_auto that failed at the synthesis level, but we probably do need to dwell on this here, the important one is v4...

 

which also failed to synthesize. The crucial error messages from the log are these:

 

Error (12006): Node instance "\adc_on:lvds_tx0" instantiates undefined entity "lvds_tx". Ensure that required library paths are specified correctly, define the specified entity, or change the instantiation. If this entity represents Intel FPGA or third-party IP, generate the synthesis files for the IP. File: /home/woj/repos/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv4_stereo/pokeymax.vhd Line: 1986

Error (12006): Node instance "\adc_on:lvds_rx0" instantiates undefined entity "lvds_rx". Ensure that required library paths are specified correctly, define the specified entity, or change the instantiation. If this entity represents Intel FPGA or third-party IP, generate the synthesis files for the IP. File: /home/woj/repos/atari_800xl/atari_chips/pokeyv2/build_10M08_fullv4_stereo/pokeymax.vhd Line: 1993

Error (23031): Evaluation of Tcl script /home/woj/intelFPGA_lite/23.1std/quartus/common/tcl/internal/qsh_flow.tcl unsuccessful

 

I have zero experience with this, but the last one might as well be the result of the first two, don't know. From your messages above, the first two seem like something you have been working on recently. In any case, no usable files are created in the process, in particular there is no POF file created.

 

All in all it seems I am not far from getting there, but I am currently stuck.