pirx Posted January 30, 2015 Share Posted January 30, 2015 (edited) why to emulate SID when you can (possibly cheaper) play Future Composer from Amiga. By "play" I mean generate bytes ready to push to POKEY. Too bad no sound input in cart port. Edited January 30, 2015 by pirx Quote Link to comment Share on other sites More sharing options...
Creature XL Posted January 30, 2015 Share Posted January 30, 2015 why to emulate SID when you can (possibly cheaper) play Future Composer from Amiga. By "play" I mean generate bytes ready to push to POKEY. Too bad no sound input in cart port. Not necessarily SID. But a SID-inspired SW-synth. Advantage is, not much memory needed and not always the same samples (sampling disk ST-01 anyone?) However, if someone has teh skills to code a SPC700 (SNES soundchip) inspired or another wavetable synth even better But hey, if we start off with a MOD player (FC is kinda MOD right?) no complains from me Quote Link to comment Share on other sites More sharing options...
Marek Konopka Posted January 30, 2015 Author Share Posted January 30, 2015 (edited) My first idea is to let the cart render the screen. That is basically what the Rotator demo is doing. The screen is partitioned into two sections. 6502 renders the upper (smaller) part and 65816 on the Veronica does the lower part. Calculations are done in parallel on both CPUs. Both CPUs render graphics data into the offscreen buffer that is located under CART window ($8000-$9FFF). No need to copy anything due to the bank switching nature of cartridge port capabilities. Since Veronica contains two switchable 16KB rambanks we get double buffering out of the box. Let alone, 6502 could play digi sound with 15KHz (or at least 7KHz). You can use Veronica for any kind of calculations one can imagine, graphics oriented, sound, math calculations, etc. It is a general purpose coprocessor. For instance, due to 65816's efficiency it is possible to write a high sampling frequency audio player if one drafts carefully a cycle exact program on 6502 that reads data from cart window location. Why setting the sample frequency as low as 15 MHz? Edited January 30, 2015 by Marek Konopka 2 Quote Link to comment Share on other sites More sharing options...
Joey Z Posted January 30, 2015 Share Posted January 30, 2015 Why setting the sample frequency as low as 15 MHz? I would guess because '15 khz' can be based off of the display timing since the horizontal refresh rate is approximately 15.75khz 1 Quote Link to comment Share on other sites More sharing options...
Marek Konopka Posted January 30, 2015 Author Share Posted January 30, 2015 I would guess because '15 khz' can be based off of the display timing since the horizontal refresh rate is approximately 15.75khz The sampling frequency does not have to be in synchronization with raster timing. One can go higher than 15 KHz especially considering the fact that 65816 can produce samples much faster then 6502 does. Quote Link to comment Share on other sites More sharing options...
Creature XL Posted January 30, 2015 Share Posted January 30, 2015 The sampling frequency does not have to be in synchronization with raster timing. One can go higher than 15 KHz especially considering the fact that 65816 can produce samples much faster then 6502 does. My idea if you will, was that the 6502 does GTIA (or other) HW register changes per scan-line as it would be useless for screen rendering. Splitting the work load as you did is not in my interest as I was looking at it from a game point-of-view. And when the co-processor can render 10 "big" sprites in 70 scan-lines (my theoretically approximation) why bother? 6502 can (must) read the joystick and handle the FSM for the player and the NPCs. Then it writes the new positions of the player sprite and the NPC sprites and animation shapes to a buffer, which the co-processor uses for its next frame. And all this in combination with DLIs. Thinking about it, guess 7.5KHz is max sampling freq, as you wouldn't have enough time on bad lines when using char-mode. OTOH, when no DLIs are needed then a POKEY timer can be used with higher frequency. Maybe that is what you have in mind. But anyhow, this is pure speculation. I try to finish a normal Atari game till summer. THEN I really would like to explore the possibilities of this piece of HW. PS: Had some beers. I think what I wrote above makes sense anyhow. However, I will better stop now and come back tomorrow Quote Link to comment Share on other sites More sharing options...
Rybags Posted January 31, 2015 Share Posted January 31, 2015 The logical way to do sound would be to pre-process. e.g. for SID emulation, just calculate the resultant sample values for each upcoming scanline with the '816 and have them ready for the 6502 to read via Timer IRQs in the next frame. At 15 MHz, such processing should allow relative HiFi vs existing methods at probably 20% or less CPU expenditure of the '816. That leaves the remaining cycles for the '816 to do rendering, calculating, other stuff. 1 Quote Link to comment Share on other sites More sharing options...
Heaven/TQA Posted January 31, 2015 Share Posted January 31, 2015 Marek... Sorry for asking if you are Konop I was too tired as we were already in touch for the delta composer Quote Link to comment Share on other sites More sharing options...
Simius Posted February 24, 2015 Share Posted February 24, 2015 There is a six modules available from first series at this time. Price is US$89 +US$10 shipping. Please the willing for confirmation of interest (PM or @) and eventuallly choice the color of the housing - white or black. All modules working at the 14.31818MHz. Close to the datasheet guaranteed 14MHz. Most worked at 16MHz but I can't guarantee it. 1 Quote Link to comment Share on other sites More sharing options...
+Stephen Posted February 24, 2015 Share Posted February 24, 2015 PM sent Quote Link to comment Share on other sites More sharing options...
+Larry Posted February 24, 2015 Share Posted February 24, 2015 PM Sent -Larry Quote Link to comment Share on other sites More sharing options...
+slx Posted February 24, 2015 Share Posted February 24, 2015 Will there be a second series? Quote Link to comment Share on other sites More sharing options...
+Spancho Posted February 24, 2015 Share Posted February 24, 2015 PM sent Quote Link to comment Share on other sites More sharing options...
Simius Posted February 24, 2015 Share Posted February 24, 2015 Will there be a second series? Possibly. If number of willing will be enough. Quote Link to comment Share on other sites More sharing options...
+Larry Posted February 26, 2015 Share Posted February 26, 2015 Are there some user docs at this time? That also might also help potential users decide to buy. -Larry Quote Link to comment Share on other sites More sharing options...
z1013 Posted February 26, 2015 Share Posted February 26, 2015 One for me please PM sent. best regards Alexander Quote Link to comment Share on other sites More sharing options...
gozar Posted February 26, 2015 Share Posted February 26, 2015 PM sent. Quote Link to comment Share on other sites More sharing options...
Marek Konopka Posted February 26, 2015 Author Share Posted February 26, 2015 Are there some user docs at this time? That also might also help potential users decide to buy. -Larry Hoping to finally get it done through the weekend. 1 Quote Link to comment Share on other sites More sharing options...
Stormbringer Posted February 27, 2015 Share Posted February 27, 2015 Can this be put into an 800 incognito? if so, what about putting it in the right slot? Quote Link to comment Share on other sites More sharing options...
Simius Posted March 4, 2015 Share Posted March 4, 2015 (edited) Test and demo software for Veronica - with the approval of author (Marek Konopka): AREGREAD - hardware register test - Atari side VREGREAD - hardware register test - Veronica side VRAMTEST - Veronica RAM test BANKTEST - Banked RAM test (need a few second) REGLOC - locate hardware register in the Veronica address area DETECTOR - detected Veronica presence and calculate clock speed. BIOSLOAD - BIOS loader, needed for DETECTOR and ROTATOR ROTATOR - rotating skulls demo - load first BIOSLOAD, then run batch file @R Veronica.atr Edited March 4, 2015 by Simius 2 Quote Link to comment Share on other sites More sharing options...
+slx Posted March 6, 2015 Share Posted March 6, 2015 Veronica cart has arrived in great shape. Hope to get to test it this weekend. Are there any docs on how to program it yet? Quote Link to comment Share on other sites More sharing options...
Roydea6 Posted March 12, 2015 Share Posted March 12, 2015 (edited) I got the Veronica cartridge today and ran the skulls demo... Nice fast and smooth ... ran all the programs in the Veronica.atr that is posted.. Need more info on usage and doc's.. Edited March 12, 2015 by rdea6 1 Quote Link to comment Share on other sites More sharing options...
Simius Posted March 12, 2015 Share Posted March 12, 2015 (edited) Detailed description is prepared by Marek Konopka. Simplified Veronica memory map: There is two memory banks (BANK0 and BANK1), 32kB each. Veronica has 64kB system RAM. The total RAM amount is 128kB. From Veronica side:0000...01FF - Zero Page RAM, Stack0200...020F - Veronica Hardware Register020F...3FFF - RAM4000...7FFF - RAM or BANK (controlled by WINDOW bit, 0 - RAM, 1 - BANK)8000...BFFF - RAMC000...FFFF - RAM or BANK (controlled by WINDOW bit, 0 - BANK, 1 - RAM)Veronica Hardware Register:bit7 SEMAPHORE (default = 1)0 - there is data for processing1 - wait for dataAtari clear this bit, when the data in BANK had prepared.Veronica set this bit, when the data in BANK had processedbit6 WINDOW (default = 0)0 - BANK mapped in C000...FFFF Veronica address area1 - BANK mapped in 4000...7FFF Veronica address areabit5 VBHALF (default = 1)0 - lower half of BANK available1 - upper half of BANK availablebit4...0 - unused (always = 1)From Atari side:8000...BFFF - System RAM/Basic ROM or BANKD5C0 - Atari Hardware RegisterAtari Hardware Register:bit7 SEMAPHORE (default = 1) common with Veronica Hardware Registerbit6 - unused (always = 1)bit5 RD5CTL (default = 0)0 - System RAM (or BASIC ROM) in A000...BFFF Atari address area1 - BANK visible in A000...BFFF Atari address areabit4 RD4CTL (default = 0)0 - System RAM in 8000...9FFF Atari address area1 - BANK visible in 8000...9FFF Atari address areabit3 ABHALF (default = 1)0 - lower half of BANK available1 - upper half of BANK availablebit2 - unused (always = 1)bit1 RAMBANK (default = 0)0 - BANK0 for Atari, BANK1 for Veronica1 - BANK1 for Atari, BANK0 for Veronicabit0 SOFTRST (default = 0)0 - set default value in Veronica Hardware Register, reset Veronica CPU1 - normal operation of Veronica CPU Simple work scheme:1. Clear SOFTRST bit2. Turn off NMI/IRQ/DMA in Atari3. Clear RAMBANK bit4. Set RD5CTL bit (and RD4CTL if required)5. Copy boot procedure for Veronica to the BANK6. Set start vector in BFFC/BFFD (be mapped to FFFC/FFFD in Veronica) to the BOOT procedure.7. Set RAMBANK bit8. Clear RD5CTL bit (and RD4CTL)9. Clear SEMAPHORE bit10. Set SOFTRST bit11. Turn on NMI/IRQ/DMA12. Wait until Veronica set SEMAPHORE bit. Sorry for bad english and some possible errors. Edited March 12, 2015 by Simius 3 Quote Link to comment Share on other sites More sharing options...
+Larry Posted March 13, 2015 Share Posted March 13, 2015 Thanks, Simius. A couple of fairly simple *well commented* examples would go a long way to making it useable. -Larry Quote Link to comment Share on other sites More sharing options...
phaeron Posted March 14, 2015 Share Posted March 14, 2015 Is the semaphore bit actually the same polarity on both sides? I had to invert it on the Veronica side to get the BIOS loader and rotator to work in emulation. Otherwise, both sides would clear the bit and wait for it to be set. Quote Link to comment Share on other sites More sharing options...
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