KMK/JZ IDEa Technical Help

[+bob1200xl]

The schematic shows quite a different circuit from the previous version. Not the least of which is they use a 29F010 flash memory rather than a 27C64...

 

Also, we need JED files to burn the GAL, but PLD files to 'see' the logic. (and make changes)

 

 

Bob

 

 

 

Phew... had to install a licensed trial of Altium designer to get at the schematic. Both GAL JED files and PDF schematic here:

 

IDEa_GALs_and_Schematic.zip

[pasiu]

I think that there is no need to keep the equation files as a top secret anymore. Feel free to modify whatever you want.

 

U1 device:

 

;PALASM Design Description

 

;---------------------------------- Declaration Segment ------------

TITLE IDEaBios

PATTERN

REVISION 2.0

AUTHOR Michal Pasiecznik/Pasiu

COMPANY

DATE 10/05/05

 

CHIP _ideabios PALCE16V8

 

;---------------------------------- PIN Declarations ---------------

PIN 1 RW COMBINATORIAL ;

PIN 2 A8 COMBINATORIAL ;

PIN 3 A9 COMBINATORIAL ;

PIN 4 A10 COMBINATORIAL ;

PIN 5 A11 COMBINATORIAL ;

PIN 6 A12 COMBINATORIAL ;

PIN 7 A13 COMBINATORIAL ;

PIN 8 A14 COMBINATORIAL ;

PIN 9 A15 COMBINATORIAL ;

PIN 11 O2 COMBINATORIAL ;

PIN 12 EXTSEL COMBINATORIAL ;

PIN 13 MPD COMBINATORIAL ;

PIN 14 DIR COMBINATORIAL ;

PIN 15 WE COMBINATORIAL ;

PIN 16 GATE COMBINATORIAL ;

PIN 17 OEROM COMBINATORIAL ;

PIN 18 OERAM COMBINATORIAL ;

PIN 19 D1XX COMBINATORIAL ;

 

;----------------------------------- Boolean Equation Segment ------

EQUATIONS

 

/D1XX = A8 * /A9 * /A10 * /A11 * A12 * /A13 * A14 * A15

 

/GATE = A8 * /A9 * /A10 * /A11 * A12 * /A13 * A14 * A15 * O2 * /MPD

 

/DIR = RW * /MPD

 

/OERAM = RW * O2 * A9 * A10 * A11 * A12 * /A13 * A14 * A15

 

/WE = /RW * O2 * A9 * A10 * A11 * A12 * /A13 * A14 * A15

 

/OEROM = /A9 * A11 * A12 * /A13 * A14 * A15

+ /A10 * A11 * A12 * /A13 * A14 * A15

 

/EXTSEL = A11 * A12 * /A13 * A14 * A15 * /MPD

 

;----------------------------------- Simulation Segment ------------

SIMULATION

 

;-------------------------------------------------------------------

 

 

U2 device

 

;PALASM Design Description

 

;---------------------------------- Declaration Segment ------------

TITLE IDEaReg

PATTERN

REVISION 2.0

AUTHOR Michal Pasiecznik/Pasiu

COMPANY

DATE 10/10/05

 

CHIP _IDEAREG PALCE16V8

 

;---------------------------------- PIN Declarations ---------------

PIN 1 O2 COMBINATORIAL ;

PIN 2 RW COMBINATORIAL ;

PIN 3 D1XX COMBINATORIAL ;

PIN 4 A6 COMBINATORIAL ;

PIN 5 A5 COMBINATORIAL ;

PIN 6 A4 COMBINATORIAL ;

PIN 7 A3 COMBINATORIAL ;

PIN 8 MPD COMBINATORIAL ;

PIN 9 A7 COMBINATORIAL ;

PIN 11 OFF COMBINATORIAL ;

PIN 12 CS1 COMBINATORIAL ;

PIN 13 CS0 COMBINATORIAL ;

PIN 14 D1FF COMBINATORIAL ;

PIN 15 OH16 COMBINATORIAL ;

PIN 16 WH16 COMBINATORIAL ;

PIN 17 BANK COMBINATORIAL ;

PIN 18 WL16 COMBINATORIAL ;

PIN 19 IOW COMBINATORIAL ;

 

;----------------------------------- Boolean Equation Segment ------

EQUATIONS

 

/IOW = A4 * /A5 * /A6 * /A7 * /RW * /D1XX * O2 * /MPD

 

WH16 = A4 * /A5 * /A6 * /A7 * RW * /D1XX * O2 * /MPD

 

/OH16 = /A4 * /A5 * /A6 * /A7 * RW * /D1XX * O2 * /MPD

 

WL16 = /A4 * /A5 * /A6 * /A7 * /RW * /D1XX * O2 * /MPD

 

/CS0 = /A3 * A4 * /A5 * /A6 * /A7 * /D1XX * /MPD

 

/CS1 = A3 * A4 * /A5 * /A6 * /A7 * /D1XX * /MPD

 

/D1FF = OFF * A4 * A5 * A6 * A7 * /D1XX * O2 * /RW

 

BANK = A5 * /A6 * A7 * /D1XX * /MPD

+ /A5 * A6 * A7 * /D1XX * /MPD

 

;----------------------------------- Simulation Segment ------------

SIMULATION

 

;-------------------------------------------------------------------

 

Michal

pasiu/ssg

[flashjazzcat]

I think that there is no need to keep the equation files as a top secret anymore. Feel free to modify whatever you want.

Very gracious!

 

Thanks for that. I just emailed Pigula asking for these files about five seconds ago.

 

EDIT: FIXED!!!

This is an archive of all the available IDEa ROMs (taken from the support DVD):

 

IDEa_ROMs.zip

 

Version 1.9 includes a file intended for a 29F010 1Mb flash chip, of which I just happen to have three (they're used on IntSDX boards). I just flashed one and the board immediately passed all stability tests. I just loaded some binaries and ran RWTEST a few times and it seems to work fine.

 

Odd, this, because although the socket on the board is 32 way and is marked 29F010, the unit arrived with a 28 pin 27PC512 PROM in its place. I had tried to flash the ROMs hosted on Draco's site to a flash chip before, but obviously the banking was wrong.

 

There were quite a few bug fixes in version 1.10 of the BIOS: really I need that one flashed to the 29F010, but it isn't immediately obvious which (if any) of the ROMs in the 1.10 folder are suitable for the 29F010...?

 

Anyway: needless to say I'm over the moon. But at the same time I'm hacked off that I had to waste three months because the board arrived with the wrong chip in it.

Edited December 9, 2010 by flashjazzcat

[flashjazzcat]

Oh yes...

 

 

 

I think one of the conclusions we can draw here is that (as Larry very insightfully pointed out) the IDEa is hugely dependent on the choice of EPROM/PROM/EEPROM.

 

However, this hardly explains away those units which work intermittently, or suddently start behaving oddly following a prolonged period of disuse. I will still never understand how my IDEa worked well enough at the beginning of November for me to create a 32MB partition full of files and folders which I used for three days without incident.

Edited December 9, 2010 by flashjazzcat

[flashjazzcat]

And who knew this would work:

 

 

I'm copying files from C: on disk 0 of the MyIDE cart (plugged into the top of the ECI adapter), onto D: on the IDEa.

[+bf2k+]

And who knew this would work:

 

[

I'm copying files from C: on disk 0 of the MyIDE cart (plugged into the top of the ECI adapter), onto D: on the IDEa.

 

Hmmm... I am going to have to try that with my MIO. Haven't had the two hooked up simultaneously.

[drac030]

fjc: good that it finally works for you. I don't know if it is written anywhere, but IDEa BIOS is ready for softloaded add-ons. There is a vector in IDEa RAM, at $DEFE, which is jumped through - using JMP () - whenever the XL OS calls the IDEa ROM. You may experiment with it, if it is necessary to apply a patch or add something.

[flashjazzcat]

fjc: good that it finally works for you. I don't know if it is written anywhere, but IDEa BIOS is ready for softloaded add-ons. There is a vector in IDEa RAM, at $DEFE, which is jumped through - using JMP () - whenever the XL OS calls the IDEa ROM. You may experiment with it, if it is necessary to apply a patch or add something.

Hmmm... that's a pretty cool feature. I wondered what that vector was for. I take it it's vectored through during INIT.

 

No doubt I'll have a lot of fun experimenting with the device. An LBA BIOS is an intriguing prospect. For now, though, I'm just happy that it works. It looks smart in its case and is a superb HDD solution. It was worth the wait.

[drac030]

I take it it's vectored through during INIT.

 

It is initialized (to default value) during every init (cold or warm reset, or power-up). It points to the main procedure which is doing the I/O.

[flashjazzcat]

I take it it's vectored through during INIT.

 

It is initialized (to default value) during every init (cold or warm reset, or power-up). It points to the main procedure which is doing the I/O.

OK - that sounds useful. Next question, then: what's the partition table layout, and how does one bank switch the ROM in the 3KB boards?

[drac030]

I take it it's vectored through during INIT.

 

It is initialized (to default value) during every init (cold or warm reset, or power-up). It points to the main procedure which is doing the I/O.

OK - that sounds useful. Next question, then: what's the partition table layout, and how does one bank switch the ROM in the 3KB boards?

 

The partition table layout is something I want to abandon, and definitely not want to become a de facto standard. So I will reveal it to you, if you want, but not to the public.

 

About the banking: it is a problem, because first versions of IDEa (rev. A) mistakenly implement the banking registers from the original (KMK/JŻ IDE). Anyway:

 

- a write to $d1c0 (and a RESET) should activate bank 0.

 

- a write to $d1a0 should activate bank 1.

 

In IDEa rev. A the registers are reversed. There are IDEas rev. B with this error fixed. I once wrote a beta-BIOS which used two banks. I got reports that it is less stable than the regular one, so I abandoned it. Despite that, now I would/will write it differently

[flashjazzcat]

Thanks! That should keep me amused over Christmas.

 

If I ever manage a complete new BIOS for my own use, I'd use the MyIDE partition table we designed anyway. But for patching the existing system (to experiment with unrolled loops, etc), clearly an understanding of the existing partition table layout is vital.

 

Hopefully you'll get a chance to have another crack at that dual-bank BIOS some time. I would be eager to test it.

Edited December 13, 2010 by flashjazzcat

[flashjazzcat]

Necro bump...

 

Thanks to Avery's help, APT BIOS for KMK / JZ is now functional and in the testing stage. Banked code wasn't needed as it turned out, since the whole BIOS fits into 1.5KB with forty odd bytes to spare. Just flashed it to my IDEa interface and it's working great with the SIDE partitioning software. Will post here when it's finished for anyone interested in trying it out (you'll need an EPROM burner).

[+Larry]

Hi Jon-

 

That's good news! Drac030 had indicated that it might be awhile for the +2 since (IIRC) the flasher wasn't available. Presume that this should work in my original style KMK-JZ which has the larger amount of ram and can use the larger 2.0x series bios in a 2764 eprom. (?) This one started out with a 1.04 bios and has seen many updates.

 

-Larry

 

 

Necro bump...

 

Thanks to Avery's help, APT BIOS for KMK / JZ is now functional and in the testing stage. Banked code wasn't needed as it turned out, since the whole BIOS fits into 1.5KB with forty odd bytes to spare. Just flashed it to my IDEa interface and it's working great with the SIDE partitioning software. Will post here when it's finished for anyone interested in trying it out (you'll need an EPROM burner).

[flashjazzcat]

That's good news! Drac030 had indicated that it might be awhile for the +2 since (IIRC) the flasher wasn't available.

 

I don't know anything about the flasher situation. I've been running an APT beta for +2 which KMK sent me last November (?) with no problems (and for which I hurriedly wrote updates for the partitioning software, still unreleased), but have heard nothing since. I was assuming he was extremely busy and simply had no time to work on it further.

 

Presume that this should work in my original style KMK-JZ which has the larger amount of ram and can use the larger 2.0x series bios in a 2764 eprom. (?) This one started out with a 1.04 bios and has seen many updates.

 

Yep - it'll work on the second revision KMK/JZ board (which I have), although it currently doesn't use the second bank of ROM / RAM. Perhaps I'll add goodies at a later date. The only bank-switching BIOS I have for it is one that KMK sent me and I think he said it was a beta. In any case, I'm assuming what I've written will also work on the earlier revision board (cased, without bank switching and which plugged directly into the back of the XE).

[Defender II]

What supplier did you get the box from for your case?

[flashjazzcat]

What supplier did you get the box from for your case?

 

Managed to find this only because I keep all my ebay emails:

 

eBay Auction -- Item Number: 390320889722

 

Cream one looks nice for XLs. Unsure who the actual manufacturer is.

[flashjazzcat]

Made a patch cable to connect my Centronics PBI connector on the 1200XL to the IDEa (the wire pairs have to be "twisted", so I accomplish this by connecting two cables with a 50 pin header array), and the latest APT BIOS version with banking appears to work well. I'm quite surprised by the stability given the profusion of mods on the 1200XL and the banked code I've introduced into the BIOS. It now supports dual drive operation (I have two CF cards hooked up). Just the mounting API to do now, once I figure out how to run all the code out of the second ROM bank.

 

I'm thinking of fitting the IDEa internally to the 1200XL. There seems little point in using my IDE Plus 2.0 with this machine when Ultimate 1MB already provides an RTC and SDX. The IDEa is an ideal HDD solution in this case.

 

I'll upload the ROM shortly when any major bugs are ironed out (together with updated FDISK and utilities, which have been tightened up somewhat).

Edited March 13, 2012 by flashjazzcat

[Defender II]

Made a patch cable to connect my Centronics PBI connector on the 1200XL to the IDEa (the wire pairs have to be "twisted", so I accomplish this by connecting two cables with a 50 pin header array), and the latest APT BIOS version with banking appears to work well. I'm quite surprised by the stability given the profusion of mods on the 1200XL and the banked code I've introduced into the BIOS. It now supports dual drive operation (I have two CF cards hooked up). Just the mounting API to do now, once I figure out how to run all the code out of the second ROM bank.

 

I'm thinking of fitting the IDEa internally to the 1200XL. There seems little point in using my IDE Plus 2.0 with this machine when Ultimate 1MB already provides an RTC and SDX. The IDEa is an ideal HDD solution in this case.

 

I'll upload the ROM shortly when any major bugs are ironed out (together with updated FDISK and utilities, which have been tightened up somewhat).

 

Thanks. I'll have to dig mine out and see if I can finally get it to work with the new ROM you are working on.

[flashjazzcat]

Thanks. I'll have to dig mine out and see if I can finally get it to work with the new ROM you are working on.

 

What kind of issues were you having? I doubt the new BIOS will fix any hardware stability problems. There are absolutely no inherent shortcomings with KMK's original BIOSes - I simply wanted to updated the unit to handle APT partitioning.

Edited March 15, 2012 by flashjazzcat

[flashjazzcat]

I did the modding to my IDEa board today, prior to (probably) fitting it in the 1200XL:

 

 

 

 

 

Thanks to Candle for pointing out the other evening that the requirement for the stupid "twist" PBI cable can be avoided by placing the 50 way header on the underside of the board. I've done this, and can now connect the unit to an XL with a standard "flat" ribbon cable. At the other end of the board, the big 40 way boxed connector was removed and replaced by another row of header pins. Meanwhile, I modded up an IDE/CF adapter so that instead of a male 40 pin header on the top, it has a female 40 way header on the bottom. This fits directly onto the IDE header on the interface board and keeps everything nice and neat. I also added a +5v jumper to the CF adapter.

 

I doubt I'd have the heart to cut a CF card slot in the back or side of the 1200XL, so the inward facing orientation of the CF card is no problem - in fact, I prefer the compactness of this arrangement. If I can find an elevated female header, I'd be able to fit a dual card adapter on there.

Edited March 15, 2012 by flashjazzcat

[+Larry]

Interesting, Jon. Please be sure to post a pic if/when you get it fitted inside the 1200XL. I'm curious to see the wiring!

 

In addition to some other changes, the IDEa can be attached to an XL without making jumpers or other mods (as opposed to the original KMK-JZ which was XE-only)?

 

-Larry

[flashjazzcat]

Interesting, Jon. Please be sure to post a pic if/when you get it fitted inside the 1200XL. I'm curious to see the wiring!

 

I'll certainly post pictures. I've identified 3 or 4 suitable places for standoffs on the motherboard. The unit will have to sit veritically (i.e. perpendicular to the longest side of the motherboard) at the extreme top right corner because of various obstructions such as VBXE and Ultimate 1MB. The wiring will simply be a 50 way ribbon cable hooked up to the back of the existing PBI connector.

 

In addition to some other changes, the IDEa can be attached to an XL without making jumpers or other mods (as opposed to the original KMK-JZ which was XE-only)?

 

Yes, the IDEa can be attached to an XL but the header pins are reversed, so some kind of twist-pair cable is required. Mounting the 50 way header on the back side of the PCB solves this problem, but also introduces another: the pins are now reversed for the XE adapter. Simple solution: reposition the header on the XE adapter on the underside of that board as well (there's plenty of clearance). I rather think it should have been this way in the first place, but I appreciate that the PBI header on the IDEa is dual purpose, in as much as there is a third row of holes for a 50 way IDC edge connector.

[flashjazzcat]

Two versions of APT ROM are now stable: a banked version which supports dual devices, and an unbanked version which supports master only. Before release I'm gonna have a crack at support for mounting ATRs in the FAT32 partition, with full read/write capability.

[Defender II]

Two versions of APT ROM are now stable: a banked version which supports dual devices, and an unbanked version which supports master only. Before release I'm gonna have a crack at support for mounting ATRs in the FAT32 partition, with full read/write capability.

That makes me want to get mine going even more!